Fix drv7s clock bug

electronics2/flashing/readme.md

@@ -598,18 +598,40 @@ Here you see [one LED blinking](https://youtu.be/dpqHkJS7RNk) to prove that the
 ## Problems
 
 Looking at the [video of the blinking LED](https://youtu.be/dpqHkJS7RNk) you might think we're done.
-But I still have a problem. The app starts after flashing, but after _power-on_ it doesn't.
+But I still have a problem. The LED driven by the app starts blinking after flashing, but after _power-on_ it doesn't.
 
 Solved it! 
 I changed [icsp.bat](ledtest/icsp.bat) not to flash `ledtest.ino.with_bootloader.eightanaloginputs.hex`, 
 but to flash `ledtest.ino.eightanaloginputs.hex`.
 Without flashing the bootloader the board runs my ledtest app when powered on!
 
-Next, I flashed the official [SSoS firmware](../../firmware) - I added a similar flash script.
+Next, I flashed the official [SSoS firmware](../../firmware/SSoS) - I added a similar flash script.
 Flashing works, booting works, but the display flickers.
-It is hard to see on the [video](https://youtu.be/p-Qe8X2YwIE)
+It is hard to see on the [video](https://youtu.be/p-Qe8X2YwIE).
 My guess: fuses need tweaking to get a faster clock.
 
+The standard firmware shows `SSoS` on power up. I put a probe on Segment A.
+It should be high for unit 0, 1, not for 2 and agaian for 3.
+The logic analyzer confirms that, see the blue rectangle that encircles one frame (4 units).
+
+![timing](segment-a.png)
+
+But we also see that each unit gets 10ms, and thus the whole frame 40ms instead of 20ms.
+At 20ms (50Hz), flicker is not visible, but at 40ms (25Hz) it is.
+
+Found the bug.
+The driver [drv7s.cpp](../../firmware/SSoS/drv7s.cpp#L157) had hard-wired the clock frequency:
+
+```c++
+OCR2A = 16000000/*CPU*/  /  64/*prescaler*/  /  1000/*targetfreq*/  -  1;
+```
+
+and I now changed that to use the system macro `F_CPU` 
+(which is 8000000 if we compile for `Board` the `Arduino Pro or Pro Mini` and `Processor` at `ATmega328P (3.3V, 8MHz)`).
+
+```c++
+OCR2A = F_CPU/*CPU*/  /  64/*prescaler*/  /  1000/*targetfreq*/  -  1;
+```
 
 (end)
 

electronics2/readme.md

@@ -206,7 +206,8 @@ Considerations before producing the board:
  - I did make my own 3D model of the [IDC connector](IDC3dModel).
 
 Considerations after producing the board:
- - One LED on the PCB might have been nice for testing bringup.
+ - One LED on the PCB might have been nice for testing bring-up.
+ - A pad for PORTB0 to do clock testing (see CKOUT fuse bit).
  - The ATmega328PB that I took is not nicely supported by Arduino. It works, but an ATmega328P would have been easier.
 
 

firmware/SSoS/SSoS.ino

@@ -1,7 +1,9 @@
 // SSoS.ino - Seven Segment over Serial firmware
+// Suggested to build for Board "Arduino Pro or Pro Mini" with Processor "ATmega328P (3.3V, 8MHz)"
+// This way, the drv7s knows the clock frequency and can adapt its refresh rate.
 #define APP_LONGNAME "Seven Segment over Serial"
 #define APP_NAME     "SSoS"
-#define APP_VERSION  "5.5"
+#define APP_VERSION  "5.6"
 #define APP_WAIT_MS  2000
 
 

firmware/SSoS/SSoS.ino.eightanaloginputs.hex

@@ -63,7 +63,7 @@
 :1003E00080911E0290911F02A0912002B0912102E3
 :1003F00026B5A89B05C02F3F19F00196A11DB11D80
 :100400003FBFBA2FA92F982F8827BC01CD01620FBB
-:10041000711D811D911D42E0660F771F881F991F76
+:10041000711D811D911D43E0660F771F881F991F75
 :100420004A95D1F708958F929F92AF92BF92CF9243
 :10043000DF92EF92FF926B017C010E94EE014B0173
 :100440005C01C114D104E104F104B9F00E94EE0191
@@ -187,13 +187,13 @@
 :100BA0000F900FBE0F901F9018958081F4CF1F9269
 :100BB0000F920FB60F9211242F933F938F939F9311
 :100BC000AF93BF9380911A0290911B02A0911C02D7
-:100BD000B0911D023091190223E0230F2D3758F5F3
-:100BE0000196A11DB11D2093190280931A029093C2
+:100BD000B0911D023091190226E0230F2D3758F5F0
+:100BE0000296A11DB11D2093190280931A029093C1
 :100BF0001B02A0931C02B0931D0280911E029091D3
 :100C00001F02A0912002B09121020196A11DB11DE9
 :100C100080931E0290931F02A0932002B0932102A2
 :100C2000BF91AF919F918F913F912F910F900FBEE8
-:100C30000F901F90189526E8230F0296A11DB11D55
+:100C30000F901F90189529E8230F0396A11DB11D51
 :100C4000D2CF1F920F920FB60F9211242F933F9382
 :100C50004F938F939F93EF93FF93809118028F5F31
 :100C60008093180290912F02891708F01BB8809189
@@ -215,17 +215,17 @@
 :100D60008100809180008160809380008091B1003B
 :100D700084608093B1008091B00081608093B00066
 :100D800080917A00846080937A0080917A008260FA
-:100D900080937A0080917A00816080937A008091BC
+:100D900080937A0080917A008E7F80937A00809190
 :100DA0007A00806880937A001092C100E0914E0230
 :100DB000F0914F02C2E0C083E0914A02F0914B02F1
-:100DC0001082E0914C02F0914D0280E180831092FC
+:100DC0001082E0914C02F0914D0288E080831092F5
 :100DD0005602E0915202F091530286E08083E09146
 :100DE0005002F0915102808180618083E091500235
 :100DF000F0915102808188608083E0915002F091EF
 :100E00005102808180688083E0915002F09151020C
 :100E100080818F7D808383ED91E00E94FA0318B872
 :100E20001BB88FEF87B98AB90E940C04F89410920E
-:100E3000B00089EF8093B300C093B00084E080934A
+:100E3000B0008CE78093B300C093B00084E080934F
 :100E4000B100C093700078940E942C0482E092E07C
 :100E50000E94840364EF71E080E090E00E9413023E
 :100E60008BE092E00E948403E0913002F0E0EE5EBD
@@ -261,10 +261,10 @@
 :1010400033004453502E32004453502E3100445349
 :10105000502E3000424C2E6D6B00424C2E6C6F00B7
 :10106000424C2E686900424C2E656E004252495433
-:10107000004D617920203820323032320031333A4D
-:1010800033373A3133000D0A00537472696E677357
+:10107000004D617920203820323032320031343A4C
+:1010800034373A3330000D0A00537472696E677357
 :101090000020000A0A536576656E205365676D650A
 :1010A0006E74206F7665722053657269616C2028BA
 :1010B00053536F53292076657273696F6E20352EF6
-:1010C0003500382E382E382E382E0053536F5300EB
+:1010C0003600382E382E382E382E0053536F5300EA
 :00000001FF

firmware/SSoS/drv7s.cpp

@@ -128,6 +128,12 @@ ISR( TIMER2_COMPA_vect ) {
   }
 }
 
+#if 0
+#define XSTR(x) STR(x)
+#define STR(x) #x
+#pragma message "F_CPU = " XSTR(F_CPU)
+#endif
+
 // Setup (hardware registers) for 7-segments
 void drv7s_setup() {
   // Setup row/column drivers
@@ -148,7 +154,7 @@ void drv7s_setup() {
   noInterrupts(); // Disable all interrupts - cli()
   TCCR2A = 0; // Do not understand why, but without first setting to 0, we get 4.063us instead of 1ms
   // Set Output Compare Register A for 1kHz (1ms)
-  OCR2A = 16000000/*CPU*/  /  64/*prescaler*/  /  1000/*targetfreq*/  -  1;
+  OCR2A = F_CPU/*CPU*/  /  64/*prescaler*/  /  1000/*targetfreq*/  -  1;
   // Turn on CTC mode (Clear Timer on Compare Match) WGM2[210]=010 (so we only set WGM21)
   TCCR2A = 1 << WGM21;
   // Select prescaler of 64 with Clock Select CS2[210]=100 (so we only set CS22)