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[darjeeling] Feed I2C RAM config to toplevel interface #25783

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merged 1 commit into from
Jan 9, 2025

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Razer6
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@Razer6 Razer6 commented Jan 7, 2025

For completion, also include the I2C ram config interface to the top-level interface of darjeeling.

@Razer6 Razer6 requested review from rswarbrick and vogelpi January 7, 2025 09:39
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Looks sensible to me. I'm pleasantly surprised to see how small the change is!

As a nitty change, would it make sense to line up i2c_ram_1p_cfg_i and i2c_ram_1p_cfg_rsp_o?

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Razer6 commented Jan 7, 2025

As a nitty change, would it make sense to line up i2c_ram_1p_cfg_i and i2c_ram_1p_cfg_rsp_o?

That is part of the code generator. The alignment here depends on the used type for the signal interface before. I don't think that this PR is the right place to unify that.

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LGTM

@vogelpi vogelpi merged commit 09caf4f into lowRISC:master Jan 9, 2025
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@Razer6 Razer6 deleted the darjeeling-i2c-ram-cfg branch January 9, 2025 14:42
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3 participants