lowRISC · matutem · Dec 23, 2024
diff --git a/BLOCKFILE b/BLOCKFILE
@@ -1,7 +1,7 @@
 # If a PR changes a file that matches a pattern in this file it will be blocked
 # from merged by CI. The patterns as glob-like patterns matched using python
 # fnmatch. In particular note there is no special handling for '/' so '*' can
-# match multiple directory levels e.g. 'this/is/*/a/path' matches both
+# match multiple directory levels e.g. 'this/is/a/*/path' matches both
 # 'this/is/a/foo/path' and 'this/is/a/foo/bar/path'.
 #
 # Anyone on the COMMITTERS list can authorize a change by adding a comment
@@ -49,7 +49,6 @@ hw/ip/keymgr/rtl/*
 hw/ip/kmac/rtl/*
 hw/ip/lc_ctrl/rtl/*
 hw/ip/otbn/rtl/*
-hw/ip/otp_ctrl/rtl/*
 hw/ip/pattgen/rtl/*
 hw/ip/prim/rtl/*
 hw/ip/prim_generic/rtl/*
@@ -92,19 +91,19 @@ hw/ip/otbn/data/otbn.hjson
 hw/ip/entropy_src/data/entropy_src.hjson
 hw/ip/aes/data/aes.hjson
 hw/ip/i2c/data/i2c.hjson
-hw/ip/otp_ctrl/data/otp_ctrl.hjson
-hw/ip/otp_ctrl/data/otp_ctrl_img_rma.hjson
-hw/ip/otp_ctrl/data/otp_ctrl_img_dev.hjson
-hw/ip/otp_ctrl/data/otp_ctrl_img_test_locked0.hjson
-hw/ip/otp_ctrl/data/otp_ctrl_img_test_locked1.hjson
-hw/ip/otp_ctrl/data/otp_ctrl_img_test_unlocked0.hjson
-hw/ip/otp_ctrl/data/otp_ctrl_img_creator_sw_cfg.hjson
-hw/ip/otp_ctrl/data/otp_ctrl_img_hw_cfg.hjson
-hw/ip/otp_ctrl/data/otp_ctrl_img_raw.hjson
-hw/ip/otp_ctrl/data/otp_ctrl_mmap.hjson
-hw/ip/otp_ctrl/data/otp_ctrl_img_test_unlocked1.hjson
-hw/ip/otp_ctrl/data/otp_ctrl_img_prod.hjson
-hw/ip/otp_ctrl/data/otp_ctrl_img_test_unlocked2.hjson
+hw/top_earlgrey/data/otp/otp_ctrl.hjson
+hw/top_earlgrey/data/otp/otp_ctrl_img_rma.hjson
+hw/top_earlgrey/data/otp/otp_ctrl_img_dev.hjson
+hw/top_earlgrey/data/otp/otp_ctrl_img_test_locked0.hjson
+hw/top_earlgrey/data/otp/otp_ctrl_img_test_locked1.hjson
+hw/top_earlgrey/data/otp/otp_ctrl_img_test_unlocked0.hjson
+hw/top_earlgrey/data/otp/otp_ctrl_img_creator_sw_cfg.hjson
+hw/top_earlgrey/data/otp/otp_ctrl_img_hw_cfg.hjson
+hw/top_earlgrey/data/otp/otp_ctrl_img_raw.hjson
+hw/top_earlgrey/data/otp/otp_ctrl_mmap.hjson
+hw/top_earlgrey/data/otp/otp_ctrl_img_test_unlocked1.hjson
+hw/top_earlgrey/data/otp/otp_ctrl_img_prod.hjson
+hw/top_earlgrey/data/otp/otp_ctrl_img_test_unlocked2.hjson
 hw/ip/rv_core_ibex/data/rv_core_ibex.hjson
 hw/ip/pwm/data/pwm.hjson
 hw/ip/aon_timer/data/aon_timer.hjson

diff --git a/SUMMARY.md b/SUMMARY.md
@@ -48,6 +48,15 @@
     - [Interface and Registers](./hw/top_earlgrey/ip_autogen/rv_plic/data/rv_plic.hjson)
     - [Device Interface Functions](./sw/device/lib/dif/dif_rv_plic.h)
     - [Checklist](./hw/top_earlgrey/ip_autogen/rv_plic/doc/checklist.md)
+  - [OTP Controller](./hw/top_earlgrey/ip_autogen/otp_ctrl/README.md)
+    - [Theory of Operation](./hw/top_earlgrey/ip_autogen/otp_ctrl/doc/theory_of_operation.md)
+    - [Design Verification](./hw/top_earlgrey/ip_autogen/otp_ctrl/dv/README.md)
+      - [Testplan](./hw/top_earlgrey/ip_autogen/otp_ctrl/data/otp_ctrl_testplan.hjson)
+    - [Programmer's Guide](./hw/top_earlgrey/ip_autogen/otp_ctrl/doc/programmers_guide.md)
+    - [Hardware Interfaces](./hw/top_earlgrey/ip_autogen/otp_ctrl/doc/interfaces.md)
+    - [Registers](./hw/top_earlgrey/ip_autogen/otp_ctrl/doc/registers.md)
+    - [Device Interface Functions](./sw/device/lib/dif/dif_otp_ctrl.h)
+    - [Checklist](./hw/top_earlgrey/ip_autogen/otp_ctrl/doc/checklist.md)
   - [Sensor Control](./hw/top_earlgrey/ip/sensor_ctrl/README.md)
     - [Theory of Operation](./hw/top_earlgrey/ip/sensor_ctrl/doc/theory_of_operation.md)
     - [Programmer's Guide](./hw/top_earlgrey/ip/sensor_ctrl/doc/programmers_guide.md)
@@ -63,6 +72,15 @@
 
 - [Top Darjeeling](./hw/top_darjeeling/README.md)
   - [Datasheet](./hw/top_darjeeling/doc/datasheet.md)
+  - [OTP Controller](./hw/top_darjeeling/ip_autogen/otp_ctrl/README.md)
+    - [Theory of Operation](./hw/top_darjeeling/ip_autogen/otp_ctrl/doc/theory_of_operation.md)
+    - [Design Verification](./hw/top_darjeeling/ip_autogen/otp_ctrl/dv/README.md)
+      - [Testplan](./hw/top_darjeeling/ip_autogen/otp_ctrl/data/otp_ctrl_testplan.hjson)
+    - [Programmer's Guide](./hw/top_darjeeling/ip_autogen/otp_ctrl/doc/programmers_guide.md)
+    - [Hardware Interfaces](./hw/top_darjeeling/ip_autogen/otp_ctrl/doc/interfaces.md)
+    - [Registers](./hw/top_darjeeling/ip_autogen/otp_ctrl/doc/registers.md)
+    - [Device Interface Functions](./sw/device/lib/dif/dif_otp_ctrl.h)
+    - [Checklist](./hw/top_darjeeling/ip_autogen/otp_ctrl/doc/checklist.md)
 
 - [Cores](./hw/doc/cores.md)
   - [Ibex RISC-V Core Wrapper](./hw/ip/rv_core_ibex/README.md)
@@ -229,15 +247,6 @@
     - [Registers](./hw/ip/lc_ctrl/doc/registers.md)
     - [Device Interface Functions](./sw/device/lib/dif/dif_lc_ctrl.h)
     - [Checklist](./hw/ip/lc_ctrl/doc/checklist.md)
-  - [OTP Controller](./hw/ip/otp_ctrl/README.md)
-    - [Theory of Operation](./hw/ip/otp_ctrl/doc/theory_of_operation.md)
-    - [Design Verification](./hw/ip/otp_ctrl/dv/README.md)
-      - [Testplan](./hw/ip/otp_ctrl/data/otp_ctrl_testplan.hjson)
-    - [Programmer's Guide](./hw/ip/otp_ctrl/doc/programmers_guide.md)
-    - [Hardware Interfaces](./hw/ip/otp_ctrl/doc/interfaces.md)
-    - [Registers](./hw/ip/otp_ctrl/doc/registers.md)
-    - [Device Interface Functions](./sw/device/lib/dif/dif_otp_ctrl.h)
-    - [Checklist](./hw/ip/otp_ctrl/doc/checklist.md)
   - [Pattern Generator](./hw/ip/pattgen/README.md)
     - [Theory of Operation](./hw/ip/pattgen/doc/theory_of_operation.md)
     - [Design Verification](./hw/ip/pattgen/dv/README.md)
@@ -420,7 +429,7 @@
 - [Device Software](./sw/device/README.md)
   - [Build & Test Rules](./rules/opentitan/README.md)
     - [FPGA Bitstreams](./hw/bitstream/README.md)
-    - [OTP Build and Test Infrastructure](./hw/ip/otp_ctrl/data/README.md)
+    - [OTP Preload Image Generator](./util/design/README.md#otp_preload_image_generator)
   - [Device Libraries](./sw/device/lib/README.md)
     - [DIF Library](./sw/device/lib/dif/README.md)
       - [ADC Checklist](sw/device/lib/dif/dif_adc_ctrl.md)

@@ -67,7 +67,6 @@ fi
 destructive_cleanup
 
 gen_hw_and_check_clean "Register headers" regs             || bad=1
-gen_hw_and_check_clean "OTP memory map"   otp-mmap         || bad=1
 gen_hw_and_check_clean "LC state"         lc-state-enc     || bad=1
 
 # This runs both top and cmdgen targets together since for ipgen

@@ -21,7 +21,7 @@ set -e
 ./bazelisk.sh build  \
     --copt=-DOT_IS_ENGLISH_BREAKFAST_REDUCED_SUPPORT_FOR_INTERNAL_USE_ONLY_ \
     --features=-rv32_bitmanip \
-    //sw/host/opentitantool //hw/ip/otp_ctrl/data:img_rma
+    //sw/host/opentitantool //hw/top_earlgrey/data/otp:img_rma
 
 # Run the one test.
 # This needs to be run outside the bazel sandbox, so we do not use `bazel run`

@@ -69,7 +69,7 @@ Specifically, you can build the [`//hw/bitstream/universal:splice`](https://gith
 For example, to splice a CW310 bitstream with the mask ROM image and a specific OTP image, you can run
 ```sh
 bazel build \
-    --//hw/bitstream/universal:otp=//hw/ip/otp_ctrl/data:img_dev \
+    --//hw/bitstream/universal:otp=//hw/top_earlgrey/data/otp:img_dev \
     --//hw/bitstream/universal:env=//hw/top_earlgrey:fpga_cw310_rom_with_fake_keys \
     //hw/bitstream/universal:splice
 ```

@@ -74,8 +74,8 @@ bazel test --test_tag_filters=verilator --test_output=streamed //sw/device/tests
 
 You should expect to see something like:
 ```console
-Invoking: sw/host/opentitantool/opentitantool --rcfile= --logging=info --interface=verilator --verilator-bin=hw/build.verilator_real/sim-verilator/Vchip_sim_tb --verilator-rom=sw/device/lib/testing/test_rom/test_rom_sim_verilator.scr.39.vmem --verilator-flash=sw/device/tests/uart_smoketest_prog_sim_verilator.64.scr.vmem --verilator-otp=hw/ip/otp_ctrl/data/img_rma.vmem console --exit-failure=(FAIL|FAULT).*\n --exit-success=PASS.*\n --timeout=3600s
-[2022-06-09T08:08:16Z INFO  opentitanlib::transport::verilator::subprocess] Spawning verilator: "hw/build.verilator_real/sim-verilator/Vchip_sim_tb" ["--meminit=rom,sw/device/lib/testing/test_rom/test_rom_sim_verilator.scr.39.vmem", "--meminit=flash,sw/device/tests/uart_smoketest_prog_sim_verilator.64.scr.vmem", "--meminit=otp,hw/ip/otp_ctrl/data/img_rma.vmem"]
+Invoking: sw/host/opentitantool/opentitantool --rcfile= --logging=info --interface=verilator --verilator-bin=hw/build.verilator_real/sim-verilator/Vchip_sim_tb --verilator-rom=sw/device/lib/testing/test_rom/test_rom_sim_verilator.scr.39.vmem --verilator-flash=sw/device/tests/uart_smoketest_prog_sim_verilator.64.scr.vmem --verilator-otp=hw/top_earlgrey/data/otp/img_rma.vmem console --exit-failure=(FAIL|FAULT).*\n --exit-success=PASS.*\n --timeout=3600s
+[2022-06-09T08:08:16Z INFO  opentitanlib::transport::verilator::subprocess] Spawning verilator: "hw/build.verilator_real/sim-verilator/Vchip_sim_tb" ["--meminit=rom,sw/device/lib/testing/test_rom/test_rom_sim_verilator.scr.39.vmem", "--meminit=flash,sw/device/tests/uart_smoketest_prog_sim_verilator.64.scr.vmem", "--meminit=otp,hw/top_earlgrey/data/otp/img_rma.vmem"]
 [2022-06-09T08:08:16Z INFO  opentitanlib::transport::verilator::stdout] Simulation of OpenTitan Earl Grey
 [2022-06-09T08:08:16Z INFO  opentitanlib::transport::verilator::stdout] =================================
 [2022-06-09T08:08:16Z INFO  opentitanlib::transport::verilator::stdout]

@@ -200,7 +200,6 @@ However, these are the requirements that the manifest format is required to supp
 [key-manager]: ../../../../hw/ip/keymgr/README.md
 [manifest-format]: ../../../../sw/device/silicon_creator/rom_ext/doc/manifest.md
 [rom-epmp]: ../../../../sw/device/silicon_creator/rom/doc/memory_protection.md
-[otp-mmap]: ../../../../hw/ip/otp_ctrl/README.md#direct-access-memory-map
 [ot-flash]: #
 [ot-unlock-flow]: #
 [ownership-transfer]: ../ownership_transfer/README.md

diff --git a/hw/bitstream/README.md b/hw/bitstream/README.md
@@ -35,7 +35,7 @@ opentitan_test(
     name = "individualize_sw_cfg_functest",
     srcs = ["individualize_sw_cfg_functest.c"],
     fpga = fpga_params(
-        otp = "//hw/ip/otp_ctrl/data/earlgrey_skus/sival:otp_img_test_unlocked0_manuf_initialized",
+        otp = "//hw/top_earlgrey/data/otp/sival_skus:otp_img_test_unlocked0_manuf_initialized",
         tags = ["manuf"],
     ),
     exec_env = {
@@ -98,4 +98,4 @@ opentitan_test(
 
 ## Read More
 
-* [OTP Build and Test Infrastructure](../ip/otp_ctrl/data/README.md)
+* [OTP Preload Image Generator](../../util/design/README.md#otp_preload_image_generator)
diff --git a/hw/bitstream/vivado/BUILD b/hw/bitstream/vivado/BUILD
@@ -24,7 +24,7 @@ _CW310_TESTROM = "//sw/device/lib/testing/test_rom:test_rom_fpga_cw310_scr_vmem"
 
 _CW340_TESTROM = _CW310_TESTROM
 
-_OTP_RMA = "//hw/ip/otp_ctrl/data:img_rma"
+_OTP_RMA = "//hw/top_earlgrey/data/otp:img_rma"
 
 _CW310_TESTROM_PATH = "{}/$(location {})".format(_PREFIX, _CW310_TESTROM)
 

@@ -15,6 +15,7 @@ filesets:
       - lowrisc:prim:cipher_pkg:0.1
       - lowrisc:prim:secded:0.1
       - lowrisc:ip:otp_ctrl_pkg:1.0
+      - lowrisc:ip_interfaces:otp_ctrl_top_specific_pkg
       - lowrisc:ip_interfaces:flash_ctrl_pkg
       - lowrisc:dv:digestpp_dpi
       - lowrisc:ip:kmac_pkg

@@ -9,7 +9,6 @@
 package otp_scrambler_pkg;
 
   import uvm_pkg::*;
-  import otp_ctrl_reg_pkg::*;
   import otp_ctrl_part_pkg::*;
   import bus_params_pkg::*;
 

@@ -101,13 +101,13 @@ ifneq (${sw_images},)
 			echo "Building SW image \"$${bazel_label}\"."; \
 			bazel_airgapped_opts=""; \
 			bazel_opts="${sw_build_opts} --define DISABLE_VERILATOR_BUILD=true"; \
-			bazel_opts+=" --//hw/ip/otp_ctrl/data:img_seed=${seed}"; \
+			bazel_opts+=" --//util/design/data:img_seed=${seed}"; \
 			if [[ "${build_seed}" != "None" ]]; then \
-				bazel_opts+=" --//hw/ip/otp_ctrl/data:lc_seed=${build_seed}"; \
-				bazel_opts+=" --//hw/ip/otp_ctrl/data:otp_seed=${build_seed}"; \
+				bazel_opts+=" --//util/design/data:lc_seed=${build_seed}"; \
+				bazel_opts+=" --//util/design/data:otp_seed=${build_seed}"; \
 			fi; \
 			if [[ -n $${BAZEL_OTP_DATA_PERM_FLAG} ]]; then \
-				bazel_opts+=" --//hw/ip/otp_ctrl/data:data_perm=$${BAZEL_OTP_DATA_PERM_FLAG}"; \
+				bazel_opts+=" --//util/design/data:data_perm=$${BAZEL_OTP_DATA_PERM_FLAG}"; \
 			fi; \
 			if [[ $${OT_AIRGAPPED} != true ]]; then \
 				echo "Building \"$${bazel_label}\" on network connected machine."; \
@@ -165,7 +165,7 @@ ifneq (${sw_images},)
 					`# Bazel 6 cquery outputs repository targets in canonical format (@//blabla) whereas bazel 5 does not, ` \
 					`# so we use a custom starlark printer to remove in leading @ when needed.` \
 					--starlark:expr='str(target.label)[1:] if str(target.label).startswith("@//") else target.label'); do \
-					if [[ $$dep == //hw/ip/otp_ctrl/data* ]] || \
+					if [[ $$dep == //hw/top_*/ip_autogen/otp_ctrl/data* ]] || \
 					  ([[ $$dep != //hw* ]] && [[ $$dep != //util* ]] && [[ $$dep != //sw/host* ]]); then \
 						for artifact in $$($${bazel_cmd} cquery $${bazel_airgapped_opts} $${dep} \
 							--ui_event_filters=-info \

diff --git a/hw/ip/BUILD b/hw/ip/BUILD
@@ -20,7 +20,6 @@ filegroup(
         "//hw/ip/kmac:all_files",
         "//hw/ip/lc_ctrl:all_files",
         "//hw/ip/otbn:all_files",
-        "//hw/ip/otp_ctrl:all_files",
         "//hw/ip/pattgen:all_files",
         "//hw/ip/prim:all_files",
         "//hw/ip/prim_generic:all_files",

diff --git a/hw/ip/README.md b/hw/ip/README.md
@@ -21,7 +21,6 @@
 | [`lc_ctrl`]      | Manages device life cycle states and transitions, and controls key manager, flash, OTP, and debug access                          |
 | [`mbx`]          | DOE mailbox for use as an integrated OpenTitan communication channel.                                                             |
 | [`otbn`]         | Programmable coprocessor for asymmetric cryptography with SCA and FI countermeasures                                              |
-| [`otp_ctrl`]     | Interfaces integrated one-time programmable memory, supports scrambling, integrity and secure wipe                                |
 | [`pattgen`]      | Transmission of short time-dependent data patterns on two clock-parallel output channels                                          |
 | [`pwm`]          | Transmission of pulse-width modulated output signals with adjustable duty cycle                                                   |
 | [`rom_ctrl`]     | Interfaces scrambled boot ROM with system bus and KMAC for initial health check after reset                                       |
@@ -56,7 +55,6 @@
 [`lc_ctrl`]: ./lc_ctrl/README.md
 [`mbx`]: ./mbx/README.md
 [`otbn`]: ./otbn/README.md
-[`otp_ctrl`]: ./otp_ctrl/README.md
 [`pattgen`]: ./pattgen/README.md
 [`pwm`]: ./pwm/README.md
 [`rom_ctrl`]: ./rom_ctrl/README.md

diff --git a/hw/ip/lc_ctrl/doc/interfaces.md b/hw/ip/lc_ctrl/doc/interfaces.md
@@ -153,7 +153,7 @@ See also [power manager documentation](../../../top_earlgrey/ip_autogen/pwrmgr/R
 
 #### OTP Interfaces
 
-All interfaces to and from OTP are explained in detail in the [OTP Specification Document](../../otp_ctrl/README.md#life-cycle-interfaces).
+All interfaces to and from OTP are explained in detail in the OTP Specification Document (for example, see [earlgrey's OTP specification](../../../top_earlgrey/ip_autogen/otp_ctrl/README.md#life-cycle-interfaces)).
 
 #### KMAC Interface