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[dv] update the ROM self hash GLS test
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This update the ROM self hash GLS test to use the a flash binary built
for the "silicon" device as this has the correct UART speed constants
that are compiled and configured by the ROM. This test is intended for
use by backend integrators during final netlist preparations.

Signed-off-by: Tim Trippel <[email protected]>
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timothytrippel committed Jul 10, 2024
1 parent cc863af commit 4e22534
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Showing 4 changed files with 29 additions and 10 deletions.
6 changes: 5 additions & 1 deletion hw/dv/tools/dvsim/sim.mk
Original file line number Diff line number Diff line change
Expand Up @@ -84,7 +84,11 @@ ifneq (${sw_images},)
flags=(`echo $$sw_image | cut -d: -f 4- --output-delimiter " "`); \
bazel_label="`echo $$sw_image | cut -d: -f 1-2`"; \
if [[ $${index} != 4 && $${index} != 5 ]]; then \
bazel_label="$${bazel_label}_$${sw_build_device}"; \
if [[ $${flags[@]} =~ "silicon_creator" ]]; then \
bazel_label="$${bazel_label}_silicon_creator"; \
else \
bazel_label="$${bazel_label}_$${sw_build_device}"; \
fi; \
bazel_cquery="labels(data, $${bazel_label}) union labels(srcs, $${bazel_label})"; \
else \
bazel_cquery="$${bazel_label}"; \
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4 changes: 2 additions & 2 deletions hw/top_earlgrey/dv/chip_rom_tests.hjson
Original file line number Diff line number Diff line change
Expand Up @@ -805,8 +805,8 @@
// name: rom_e2e_self_hash_no_bkdr_rom_load
// uvm_test_seq: chip_sw_base_vseq
// sw_images: [
// "//sw/device/silicon_creator/rom/e2e/release:rom_e2e_self_hash_test:1:new_rules"
// "//sw/device/silicon_creator/rom/e2e/release:otp_img_sigverify_spx_rma:4",
// "//sw/device/silicon_creator/rom/e2e/release:rom_e2e_self_hash_test:1:new_rules:silicon_creator",
// "//sw/device/silicon_creator/rom/e2e/release:otp_img_sigverify_spx_prod:4",
// ]
// // We purposely use the `sw_test_mode_common` run mode here instead of the
// // run modes that add either ROM image to the list of sw_images to
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22 changes: 15 additions & 7 deletions hw/top_earlgrey/dv/env/chip_env_cfg.sv
Original file line number Diff line number Diff line change
Expand Up @@ -431,16 +431,24 @@ class chip_env_cfg #(type RAL_T = chip_ral_pkg::chip_reg_block) extends cip_base
sw_images[i] = $sformatf("%0s_%0s", sw_images[i], sw_build_device);
end
end else if (i inside {SwTypeTestSlotA, SwTypeTestSlotB}) begin
// If Test type (e.g., opentitan_functest) and flash image was
// generated by the `opentitan_functest` Bazel macro itself, then we
// need to tweak the name, as the flash binary target has the `_prog`
// suffix attached (to differentiate between the `sh_test` target
// also generated by the same Bazel macro.
// If test type is `opentitan_test` and the flash image was generated
// by the `opentitan_test` Bazel macro itself, or it was generated
// by the `opentitan_flash_binary` or `opentitan_binary` Bazel macros,
// then we only need to append the device suffix.
if ("ot_flash_binary" inside {sw_image_flags[i]} ||
"new_rules" inside {sw_image_flags[i]}) begin
sw_images[i] = $sformatf("%0s_%0s", sw_images[i], sw_build_device);
// If Test type (e.g., opentitan_functest) and flash image was by a
// `opentitan_flash_binary` macro, then no need to tweak the name.
// If the tag `silicon_creator` is inside the list of flags, we want
// to use a flash image built for the `silicon_creator` device. This
// is used for GLS tests that integrate the ROM macro, which is built
// for the `silicon_creator` device, not the `sim_dv` device.
end else if ("silicon_creator" inside {sw_image_flags[i]}) begin
sw_images[i] = $sformatf("%0s_silicon_creator", sw_images[i]);
// If test type is `opentitan_functest` (the legacy OpenTitan Bazel
// test macro), and said macro generated the flash image, then we
// need to tweak the name, as the flash binary target has the `_prog`
// suffix attached (to differentiate between the `sh_test` target
// also generated by the same Bazel `opentitan_functest` macro).
end else begin
sw_images[i] = $sformatf("%0s_prog_%0s", sw_images[i], sw_build_device);
end
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Original file line number Diff line number Diff line change
Expand Up @@ -46,6 +46,10 @@ const uint32_t kFpgaCw310GoldenRomHash[kSha256HashSizeIn32BitWords] = {
0xb1ebe528, 0xe461696b, 0x55d795e8, 0x5e57a7da,
0x04007623, 0xb4b121cb, 0x572fcc0a, 0x76c45aea,
};
const uint32_t kSiliconGoldenRomHash[kSha256HashSizeIn32BitWords] = {
0x0ad1f73d, 0xf1c010da, 0x2dd0186a, 0x78f1be69,
0x0f01949c, 0xf61ec134, 0x14d56198, 0x8d971279,
};

extern const char _chip_info_start[];

Expand Down Expand Up @@ -75,6 +79,9 @@ status_t hash_rom(void) {
} else if (kDeviceType == kDeviceFpgaCw310) {
TRY_CHECK_ARRAYS_EQ(rom_hash.digest, kFpgaCw310GoldenRomHash,
ARRAYSIZE(kFpgaCw310GoldenRomHash));
} else if (kDeviceType == kDeviceSilicon) {
TRY_CHECK_ARRAYS_EQ(rom_hash.digest, kSiliconGoldenRomHash,
ARRAYSIZE(kSiliconGoldenRomHash));
} else {
LOG_ERROR("ROM hash not self-checked for this device type: 0x%x",
kDeviceType);
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