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[multitop] Devicetables SW #4140

[multitop] Devicetables SW

[multitop] Devicetables SW #4140

Triggered via pull request January 8, 2025 15:52
Status Success
Total duration 5h 0m 22s
Artifacts 31

ci.yml

on: pull_request
Earl Grey for CW310 Hyperdebug  /  Build bitstream
1h 4m
Earl Grey for CW310 Hyperdebug / Build bitstream
Earl Grey for CW310  /  Build bitstream
1h 6m
Earl Grey for CW310 / Build bitstream
Earl Grey for CW340  /  Build bitstream
1h 35m
Earl Grey for CW340 / Build bitstream
Lint (slow)
12m 22s
Lint (slow)
Build documentation
5m 15s
Build documentation
Airgapped build
10m 16s
Airgapped build
Verible lint
1m 6s
Verible lint
Run OTBN smoke Test
3m 0s
Run OTBN smoke Test
Run OTBN crypto tests
23m 26s
Run OTBN crypto tests
Verilated English Breakfast
9m 21s
Verilated English Breakfast
Verilated Earl Grey
1h 27m
Verilated Earl Grey
CW305's Bitstream
23m 24s
CW305's Bitstream
Build Docker Containers
2m 30s
Build Docker Containers
Build and test software
20m 37s
Build and test software
CW310 ROM_EXT Tests  /  FPGA test
9m 12s
CW310 ROM_EXT Tests / FPGA test
CW310 SiVal Tests  /  FPGA test
26m 24s
CW310 SiVal Tests / FPGA test
CW310 SiVal ROM_EXT Tests  /  FPGA test
40m 27s
CW310 SiVal ROM_EXT Tests / FPGA test
CW310 Manufacturing Tests  /  FPGA test
30m 2s
CW310 Manufacturing Tests / FPGA test
CW310 Test ROM Tests  /  FPGA test
4m 35s
CW310 Test ROM Tests / FPGA test
CW310 ROM Tests  /  FPGA test
42m 4s
CW310 ROM Tests / FPGA test
CW340 Test ROM Tests  /  FPGA test
5m 13s
CW340 Test ROM Tests / FPGA test
CW340 ROM Tests  /  FPGA test
44s
CW340 ROM Tests / FPGA test
CW340 ROM_EXT Tests  /  FPGA test
7m 20s
CW340 ROM_EXT Tests / FPGA test
CW340 SiVal Tests  /  FPGA test
19m 38s
CW340 SiVal Tests / FPGA test
CW340 SiVal ROM_EXT Tests  /  FPGA test
5m 30s
CW340 SiVal ROM_EXT Tests / FPGA test
CW340 Manufacturing Tests  /  FPGA test
46m 24s
CW340 Manufacturing Tests / FPGA test
Cache bitstreams to GCP
0s
Cache bitstreams to GCP
Verify FPGA jobs
25s
Verify FPGA jobs
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Annotations

8 errors
Lint (slow)
Countermeasure check failed.
Lint (slow)
Process completed with exit code 1.
Lint (slow)
Some target names have banned characters.
Lint (slow)
Process completed with exit code 1.
Lint (slow)
Process completed with exit code 1.
Lint (slow)
Countermeasure check failed.
Lint (slow)
Process completed with exit code 1.
Build and test software
Process completed with exit code 1.

Artifacts

Produced during runtime
Name Size
chip_englishbreakfast_cw305
1.4 MB
execute_manuf_fpga_tests_cw310-targets
623 Bytes
execute_manuf_fpga_tests_cw310-test-results
58.2 KB
execute_manuf_fpga_tests_cw340-targets
594 Bytes
execute_manuf_fpga_tests_cw340-test-results
56.5 KB
execute_rom_ext_fpga_tests_cw310-targets
519 Bytes
execute_rom_ext_fpga_tests_cw310-test-results
12.9 KB
execute_rom_ext_fpga_tests_cw340-targets
437 Bytes
execute_rom_ext_fpga_tests_cw340-test-results
7.22 KB
execute_rom_fpga_tests_cw310-targets
1.76 KB
execute_rom_fpga_tests_cw310-test-results
47.1 KB
execute_rom_fpga_tests_cw340-targets
162 Bytes
execute_rom_fpga_tests_cw340-test-results
201 Bytes
execute_sival_fpga_tests_cw310-targets
784 Bytes
execute_sival_fpga_tests_cw310-test-results
36.9 KB
execute_sival_fpga_tests_cw340-targets
502 Bytes
execute_sival_fpga_tests_cw340-test-results
39.5 KB
execute_sival_rom_ext_fpga_tests_cw310-targets
2.25 KB
execute_sival_rom_ext_fpga_tests_cw310-test-results
186 KB
execute_sival_rom_ext_fpga_tests_cw340-targets
435 Bytes
execute_sival_rom_ext_fpga_tests_cw340-test-results
17.2 KB
execute_test_rom_fpga_tests_cw310-targets
326 Bytes
execute_test_rom_fpga_tests_cw310-test-results
3.28 KB
execute_test_rom_fpga_tests_cw340-targets
258 Bytes
execute_test_rom_fpga_tests_cw340-test-results
44.4 KB
partial-build-bin-chip_earlgrey_cw310
6.04 MB
partial-build-bin-chip_earlgrey_cw310_hyperdebug
6.02 MB
partial-build-bin-chip_earlgrey_cw340
9.9 MB
sw_build_test-test-results
72.4 KB
verilated_englishbreakfast
6.99 MB
verilator_earlgrey-test-results
8.76 KB