Proof-of-concept Nix environments for Ibex development

Makefile

@@ -6,92 +6,138 @@ all: help
 
 .PHONY: help
 help:
-	@echo "This is a short hand for running popular tasks."
-	@echo "Please check the documentation on how to get started"
-	@echo "or how to set-up the different environments."
+	@echo "The following targets are a good starting point for newcomers:"
+	@echo ""
+	@echo " > Run ibex simulations using verilator"
+	@echo " make run-simple-system-hello"
+	@echo " make run-coremark"
+	@echo " make run-pmp-smoke-test"
+	@echo " make run-csr-test"
+	@echo ""
+	@echo " > Run ibex DV environment"
+	@echo " > (If you have access to EDA simulation tools)"
+	@echo " make -C dv/uvm/core_ibex SIMULATOR=xlm ITERATIONS=4 TEST=riscv_rand_instr_test COV=1"
+	@echo ""
+	@echo " > Run yosys flow using nangate45"
+	@echo " make run_syn_yosys_nangate45"
+	@echo ""
+	@echo " > (caution: clears all working changes)"
+	@echo " make reset"
 
 # Use a parallel run (make -j N) for a faster build
 build-all: build-riscv-compliance build-simple-system build-arty-100 \
       build-csr-test
 
 
-# RISC-V compliance
-.PHONY: build-riscv-compliance
-build-riscv-compliance:
-	fusesoc --cores-root=. run --target=sim --setup --build \
-		lowrisc:ibex:ibex_riscv_compliance \
-		$(FUSESOC_CONFIG_OPTS)
+#################
+# Simple system #
+#################
 
-
-# Simple system
 # Use the following targets:
-# - "build-simple-system"
-# - "run-simple-system"
 .PHONY: build-simple-system
-build-simple-system:
+.PHONY: build-simple-system-hello-bin
+.PHONY: run-simple-system-hello
+
+simple-system-Vibex=build/lowrisc_ibex_ibex_simple_system_0/sim-verilator/Vibex_simple_system
+hello-bin=examples/sw/simple_system/hello_test/hello_test.vmem
+
+build-simple-system: $(simple-system-Vibex)
+$(simple-system-Vibex):
 	fusesoc --cores-root=. run --target=sim --setup --build \
 		lowrisc:ibex:ibex_simple_system \
 		$(FUSESOC_CONFIG_OPTS)
 
-simple-system-program = examples/sw/simple_system/hello_test/hello_test.vmem
-sw-simple-hello: $(simple-system-program)
-
-.PHONY: $(simple-system-program)
-$(simple-system-program):
+build-simple-system-hello-bin: $(hello-bin)
+$(hello-bin):
 	cd examples/sw/simple_system/hello_test && $(MAKE)
 
-Vibex_simple_system = \
-      build/lowrisc_ibex_ibex_simple_system_0/sim-verilator/Vibex_simple_system
-$(Vibex_simple_system):
-	@echo "$@ not found"
-	@echo "Run \"make build-simple-system\" to create the dependency"
-	@false
-
-run-simple-system: sw-simple-hello | $(Vibex_simple_system)
+run-simple-system-hello: $(hello-bin) $(simple-system-Vibex)
 	build/lowrisc_ibex_ibex_simple_system_0/sim-verilator/Vibex_simple_system \
-		--raminit=$(simple-system-program)
+			--raminit=$(hello-bin)
+	@echo ""
+	cat ibex_simple_system.log
+
+# Coremark
+# See 'examples/sw/benchmarks/README.md' for more details
+
+# Use the following targets:
+.PHONY: build-ss-maxperf-coremark
+.PHONY: build-coremark-sw
+.PHONY: run-coremark
 
+coremark-maxperf-Vibex=build/lowrisc_ibex_ibex_simple_system_0/sim-verilator/Vibex_simple_system
+coremark-bin=examples/sw/benchmarks/coremark/coremark.elf
+
+build-ss-maxperf-coremark: $(coremark-maxperf-Vibex)
+$(coremark-maxperf-Vibex):
+	fusesoc --cores-root=. run --target=sim --setup --build lowrisc:ibex:ibex_simple_system `./util/ibex_config.py maxperf fusesoc_opts`
+
+build-coremark-sw: $(coremark-bin)
+$(coremark-bin):
+	make -C ./examples/sw/benchmarks/coremark/
+
+run-coremark: build-ss-maxperf-coremark build-coremark-sw
+	$(coremark-maxperf-Vibex) --meminit=ram,$(coremark-bin)
+	@echo ""
+	grep "CoreMark" ./ibex_simple_system.log
+
+# pmp_smoke_test
+
+# Use the following targets:
+.PHONY: build-simple-system
+.PHONY: build-pmp-smoke-test-sw
+.PHONY: run-pmp-smoke-test
+
+pmp-smoke-test-bin=examples/sw/simple_system/pmp_smoke_test/pmp_smoke_test.elf
+
+build-pmp-smoke-test-sw: $(pmp-smoke-test-bin)
+$(pmp-smoke-test-bin):
+	make -C ./examples/sw/simple_system/pmp_smoke_test
+
+run-pmp-smoke-test: build-simple-system build-pmp-smoke-test-sw
+	$(simple-system-Vibex) --meminit=ram,$(pmp-smoke-test-bin)
+	@echo ""
+	cat ibex_simple_system.log
+
+########################
+# Arty A7 FPGA example #
+########################
+
+# DEAD - DO NOT USE THIS SECTION #
 
-# Arty A7 FPGA example
 # Use the following targets (depending on your hardware):
-# - "build-arty-35"
-# - "build-arty-100"
-# - "program-arty"
+.PHONY: build-arty-35
+.PHONY: build-arty-100
+.PHONY: program-arty
+
 arty-sw-program = examples/sw/led/led.vmem
 sw-led: $(arty-sw-program)
 
 .PHONY: $(arty-sw-program)
 $(arty-sw-program):
 	cd examples/sw/led && $(MAKE)
 
-.PHONY: build-arty-35
 build-arty-35: sw-led
 	fusesoc --cores-root=. run --target=synth --setup --build \
 		lowrisc:ibex:top_artya7 --part xc7a35ticsg324-1L
 
-.PHONY: build-arty-100
 build-arty-100: sw-led
 	fusesoc --cores-root=. run --target=synth --setup --build \
 		lowrisc:ibex:top_artya7 --part xc7a100tcsg324-1
 
-.PHONY: program-arty
 program-arty:
 	fusesoc --cores-root=. run --target=synth --run \
 		lowrisc:ibex:top_artya7
 
 
-# Lint check
-.PHONY: lint-core-tracing
-lint-core-tracing:
-	fusesoc --cores-root . run --target=lint lowrisc:ibex:ibex_core_tracing \
-		$(FUSESOC_CONFIG_OPTS)
+##########################
+# CS Registers testbench #
+##########################
 
-
-# CS Registers testbench
 # Use the following targets:
-# - "build-csr-test"
-# - "run-csr-test"
 .PHONY: build-csr-test
+.PHONY: run-csr-test
+
 build-csr-test:
 	fusesoc --cores-root=. run --target=sim --setup --build \
 	      --tool=verilator lowrisc:ibex:tb_cs_registers
@@ -102,11 +148,44 @@ $(Vtb_cs_registers):
 	@echo "Run \"make build-csr-test\" to create the dependency"
 	@false
 
-.PHONY: run-csr-test
 run-csr-test: | $(Vtb_cs_registers)
 	fusesoc --cores-root=. run --target=sim --run \
 	      --tool=verilator lowrisc:ibex:tb_cs_registers
 
+#############
+# Synthesis #
+#############
+
+# Use the following targets:
+.PHONY: run_syn_yosys_nangate45
+
+run_syn_yosys_nangate45:
+	pushd syn/ && \
+	./syn_yosys.sh && \
+	popd
+
+#########
+# Other #
+#########
+
+# RISC-V compliance
+.PHONY: build-riscv-compliance
+build-riscv-compliance:
+	fusesoc --cores-root=. run --target=sim --setup --build \
+		lowrisc:ibex:ibex_riscv_compliance \
+		$(FUSESOC_CONFIG_OPTS)
+
+
+########
+# UTIL #
+########
+
+# Lint check
+.PHONY: lint-top-tracing
+lint-top-tracing:
+	fusesoc --cores-root . run --target=lint lowrisc:ibex:ibex_top_tracing \
+		$(FUSESOC_CONFIG_OPTS)
+
 # Echo the parameters passed to fusesoc for the chosen IBEX_CONFIG
 .PHONY: test-cfg
 test-cfg:
@@ -115,3 +194,12 @@ test-cfg:
 .PHONY: python-lint
 python-lint:
 	$(MAKE) -C util lint
+
+.PHONY: clean
+clean:
+	rm -rf build/
+
+.PHONY: reset
+reset:
+	git clean -ffdx; git clean -ffdX; git reset --hard HEAD
+

ci/install-build-deps.sh

@@ -1,4 +1,4 @@
-#!/bin/bash
+#!/usr/bin/env bash
 # Copyright lowRISC contributors.
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0

ci/run-cosim-test.sh

@@ -1,4 +1,4 @@
-#!/bin/bash
+#!/usr/bin/env bash
 # Copyright lowRISC contributors.
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0

dv/uvm/core_ibex/.gitignore

@@ -23,3 +23,5 @@ xmsc.log
 # Generated by coverage
 imc.key
 mdv.log
+
+.fsm.sch.verilog.xml

dv/uvm/core_ibex/scripts/build_instr_gen.py

@@ -44,6 +44,8 @@ def _main() -> int:
              '--end_signature_addr', md.signature_addr])]
 
     retcode = run_one(md.verbose, md.riscvdv_build_cmds[0], redirect_stdstreams=md.riscvdv_build_stdout)
+    if retcode:
+        logger.warning(f"WARNING: Saw non-zero retcode while building instr_gen : logfile -> {md.riscvdv_build_stdout}")
 
     return retcode
 

dv/uvm/core_ibex/scripts/compile_tb.py

@@ -14,6 +14,7 @@
 from ibex_cmd import get_compile_opts
 from scripts_lib import run_one
 import riscvdv_interface
+import nix_lib
 
 import logging
 logger = logging.getLogger(__name__)
@@ -34,7 +35,8 @@ def _get_iss_pkgconfig_flags(specifiers, iss_pc, simulator):
         # tool, and its easy for the options to arrive malformed. Use
         # the following hack to get it through.
         if '-Wl' in _flags:  # This should be in LDFLAGS only
-            _flags = "'-Xlinker {}'".format(_flags.replace('-Wl,', ''))
+            _flags = "-Xlinker,{}".format(_flags.replace('-Wl,', ''))
+
     return _flags
 
 
@@ -108,8 +110,22 @@ def _main() -> int:
             compile_fd.write(f"Running compile_tb command :\n{' '.join(cmd)}\n".encode())
             retcode = run_one(md.verbose, cmd, redirect_stdstreams=compile_fd)
             if retcode:
+                logger.warning(f"WARNING: Saw non-zero retcode while compiling testbench : logfile -> {md.tb_build_stdout}")
                 return retcode
 
+
+    # If in a nix shell, patch the compiled simulation executable to use our chosen shared libraries
+    if os.getenv("IBEX_NIX_SHELL_LIB") is not None:
+        if md.simulator == "xlm":
+            so = md.dir_tb / "xcelium.d" / "run.d" / "librun.so"
+
+            # nix_lib.patch_rpath(so) # Doesn't work
+            nix_lib.patch_dtneeded(so)
+
+            # Finally, strip the rpath of unecessary entries
+            cmd = ["patchelf", str(so), "--shrink-rpath"]
+            subprocess.check_output(cmd)
+
     return 0
 
 

dv/uvm/core_ibex/scripts/compile_test.py

@@ -51,6 +51,7 @@ def get_riscvdv_compile_cmds(md: RegressionMetadata, trr: TestRunResult) -> List
                          cmd=trr.compile_asm_gen_cmds[0],
                          redirect_stdstreams=trr.compile_asm_gen_log)
         if dv_ret:
+            logger.warning(f"WARNING: Saw non-zero retcode while compiling test : logfile -> {trr.compile_asm_gen_log}")
             return dv_ret
 
         orig_cmds = []

dv/uvm/core_ibex/scripts/get_fcov.py

@@ -30,6 +30,8 @@ def _main():
 
     retcode = run_one(md.verbose, md.riscvdv_fcov_cmds[0], md.riscvdv_fcov_stdout)
 
+    if retcode:
+        logger.warning(f"WARNING: Saw non-zero retcode while generating riscv-dv fcov : logfile -> {md.riscvdv_fcov_stdout}")
     return retcode