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Lowrisc ip update #2145

Merged
merged 2 commits into from
Mar 1, 2024
Merged

Lowrisc ip update #2145

merged 2 commits into from
Mar 1, 2024

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GregAC
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@GregAC GregAC commented Feb 29, 2024

Vendors in the latest IP from opentitan.

prim_count has changed so a small tweak to ibex_lockstep was required. There are no functional differences.

Update code from upstream repository
https://github.com/lowRISC/opentitan to revision
e0c40265019aa0c74e6903d3b3a144c48a3815ec

* [prim/lint] Fix long line lint error in prim_intr_hw (Alexander
  Williams)
* [csr_seq_lib] Avoid slicing a queue (Rupert Swarbrick)
* [dv] Make mem_model's compare_byte function less chatty (Rupert
  Swarbrick)
* [doc,prim] Improve comments in prim_intr_hw (Harry Callahan)
* [dvsim] Format FormalCfg code. (Miguel Osorio)
* [dvsim] Add results_server dependency to FormalCfg (Miguel Osorio)
* [prim_sha2] Add `hash_running_o` (Andreas Kurth)
* [prim_sha2] Add `hash_continue_i` (Andreas Kurth)
* [prim_sha2] Make digest writable from input while disabled (Andreas
  Kurth)
* [dv,random_reset] Enhance handling of random resets (Guillermo
  Maturana)
* [dv] Change implementation of special mubi access modes (Michael
  Schaffner)
* [dv,cov_merge] Do serial coverage merge for vcs (Guillermo Maturana)
* [dv/csr_utils] Change csr_peek to return the peeked value (Rupert
  Swarbrick)
* [dv/csr_utils] Expand a documentation comment in csr_peek (Rupert
  Swarbrick)
* [dv/csr_utils] Simplify HDL path checking in csr_peek (Rupert
  Swarbrick)
* [dv/csr_utils] Use DV_CHECK to simplify code structure in csr_peek
  (Rupert Swarbrick)
* [dv/csr_utils] Fix a seeming typo in csr_peek (Rupert Swarbrick)
* [dv/csr_utils] Change `csr_peek` to function (Andreas Kurth)
* [prim] Fix lint error in shadow register subreg primitive (Pirmin
  Vogel)
* [otp_ctrl] Add second HW_CFG partition (Michael Schaffner)
* [primgen] Fix parameters in a primgen template (Rupert Swarbrick)
* [prim] Avoid unnecessary Impl parameter in prim_onehot_check (Rupert
  Swarbrick)
* [hw,prim,sha2] Fix syntax error in waiver file (Robert Schilling)
* [prim_sha2,rtl] prim_sha2 minor RTL and styling fixes (Ghada
  Dessouky)
* [prim_sha2,rtl] Add RTL implementation + update core + lint waivers
  (Ghada Dessouky)
* [otp_ctrl] Remove entropy_src chicken switches (Michael Schaffner)
* [dv] Correct direct prediction of regwen (Michael Schaffner)
* [clkmgr] Restructure division clock feedback (Michael Schaffner)
* Revert "[edn] Move prim_edn_req out of prim" (Rupert Swarbrick)
* [rtl, prim] Add 'commit' functionality to prim_count (Greg Chadwick)
* [prim] Fix up 1r1w cores (Alexander Williams)
* [prim] Add two-port memory ECC wrappers (Michael Schaffner)
* [prim] Add two-port memory implementation (Michael Schaffner)
* [prim] Make copies of dual port memory files (Michael Schaffner)
* [otp_ctrl] Add support for multiple HW_CFG partitions (Michael
  Schaffner)
* [otp_ctrl] Add option to disable integrity on a partition (Michael
  Schaffner)
* [dv] Enhance RAL model with clearable mubi types (Michael Schaffner)

Signed-off-by: Greg Chadwick <[email protected]>
The latest version of `prim_count` from OpenTitan introduces a
`commit_i` input. To retain the behaviour of the previous `prim_count`
this should be set to a constant 1.

The `cnt_next_o` output has been renamed to `cnt_after_commit_o`.
@msfschaffner
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Does it maybe make sense to wait until the CIP lib changes have been merged here lowRISC/opentitan#21226? Just because all of that stuff gets vendored.

@GregAC
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GregAC commented Mar 1, 2024

Does it maybe make sense to wait until the CIP lib changes have been merged here lowRISC/opentitan#21226? Just because all of that stuff gets vendored.

I don't think it matters, Ibex doesn't use those parts of the CIP lib (the icache testbench uses some of it, but it doesn't care about interrupts).

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@marnovandermaas marnovandermaas left a comment

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Had a quick look through the vendored in IP and I think the only thing is the update to prim_count.

@marnovandermaas marnovandermaas added this pull request to the merge queue Mar 1, 2024
Merged via the queue into lowRISC:master with commit 27dd6b2 Mar 1, 2024
11 checks passed
@GregAC GregAC deleted the lowrisc_ip_update branch March 1, 2024 11:02
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3 participants