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[ARM] Fix MRC cp10 and cp11 warning #126407

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4 changes: 2 additions & 2 deletions llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -77,8 +77,8 @@ static bool getMCRDeprecationInfo(MCInst &MI, const MCSubtargetInfo &STI,
static bool getMRCDeprecationInfo(MCInst &MI, const MCSubtargetInfo &STI,
std::string &Info) {
if (STI.hasFeature(llvm::ARM::HasV7Ops) &&
((MI.getOperand(0).isImm() && MI.getOperand(0).getImm() == 10) ||
(MI.getOperand(0).isImm() && MI.getOperand(0).getImm() == 11))) {
((MI.getOperand(1).isImm() && MI.getOperand(1).getImm() == 10) ||
(MI.getOperand(1).isImm() && MI.getOperand(1).getImm() == 11))) {
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Info = "since v7, cp10 and cp11 are reserved for advanced SIMD or floating "
"point instructions";
return true;
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10 changes: 7 additions & 3 deletions llvm/test/MC/ARM/diagnostics.s
Original file line number Diff line number Diff line change
Expand Up @@ -172,9 +172,13 @@

@ p10 and p11 are reserved for NEON
mcr p10, #2, r5, c1, c1, #4
mcrr p11, #8, r5, r4, c1
@ CHECK-WARN: warning: since v7, cp10 and cp11 are reserved for advanced SIMD or floating point instructions
@ CHECK-WARN: warning: since v7, cp10 and cp11 are reserved for advanced SIMD or floating point instructions
mcr p11, #2, r5, c1, c1, #4
mrc p10, #7, r5, c1, c1, #0
mrc p11, #7, r5, c1, c1, #0
@ CHECK-ERROR-V7: warning: since v7, cp10 and cp11 are reserved for advanced SIMD or floating point instructions
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Should this work with V8 too?

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In armv8 is an error: invalid operand for instruction

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Ah OK. Sounds good then. Thanks for checking.

@ CHECK-ERROR-V7: warning: since v7, cp10 and cp11 are reserved for advanced SIMD or floating point instructions
@ CHECK-ERROR-V7: warning: since v7, cp10 and cp11 are reserved for advanced SIMD or floating point instructions
@ CHECK-ERROR-V7: warning: since v7, cp10 and cp11 are reserved for advanced SIMD or floating point instructions

@ Out of range immediate for MOV
movw r9, 0x10000
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