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1. .dev .dev Public

   Personal website and blog

   HTML

2. cu-fpga cu-fpga Public

   Experiments with the Alchitry Cu FPGA board

   SystemVerilog 1

3. CharLib CharLib Public

   Forked from stineje/CharLib

   A standard-cell library characterizer focused on ease-of-use and accuracy

   Python

4. openhwgroup/cvw openhwgroup/cvw Public

   CORE-V Wally is a configurable RISC-V Processor associated with RISC-V System-on-Chip Design textbook. Contains a 5-stage pipeline, support for A, B, C, D, F, M and Q extensions, and optional cache…

   SystemVerilog 299 200

5. getsolus/packages getsolus/packages Public

   Solus Package Monorepo & Issue Tracker

   Shell 70 93

6. bespoke-silicon-group/basejump_stl bespoke-silicon-group/basejump_stl Public

   BaseJump STL: A Standard Template Library for SystemVerilog

   SystemVerilog 537 99