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arch: use raw_spin_[un]lock to replace spin_[un]lock, fix regression b…
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…69111d of apache#14578

reason:
Due to the addition of sched_lock in the spinlock, using a spinlock in the *cpustart file during the boot phase
is quite special. CPU0 waits for CPU1 to start up, using a spinlock as a multi-core synchronization strategy.
However, the matching calls are not made within the same task,
resulting in a mismatch in the scheduler lock count and preventing the system from booting.
The sequence is:
CPU0 spin_lock, spin_lock, spin_unlock;
CPU1 spin_unlock.
CPU0 and CPU1 are running different tasks.

Signed-off-by: hujun5 <[email protected]>
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@hujun260
hujun260 committed Jan 25, 2025
1 parent 8f3a2a6 commit 2f75893
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Showing 8 changed files with 32 additions and 32 deletions.
8 changes: 4 additions & 4 deletions arch/arm/src/cxd56xx/cxd56_cpustart.c
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Original file line number Diff line number Diff line change
Expand Up @@ -122,7 +122,7 @@ static void appdsp_boot(void)
irq_attach(CXD56_IRQ_SMP_CALL, cxd56_smp_call_handler, NULL);
up_enable_irq(CXD56_IRQ_SMP_CALL);

spin_unlock(&g_appdsp_boot);
raw_spin_unlock(&g_appdsp_boot);

#ifdef CONFIG_SCHED_INSTRUMENTATION
/* Notify that this CPU has started */
Expand Down Expand Up @@ -189,7 +189,7 @@ int up_cpu_start(int cpu)
tcb->adj_stack_size, VECTOR_ISTACK);
putreg32((uint32_t)appdsp_boot, VECTOR_RESETV);

spin_lock(&g_appdsp_boot);
raw_spin_lock(&g_appdsp_boot);

/* See 3.13.4.16.3 ADSP Startup */

Expand Down Expand Up @@ -238,11 +238,11 @@ int up_cpu_start(int cpu)
up_enable_irq(CXD56_IRQ_SMP_CALL);
}

spin_lock(&g_appdsp_boot);
raw_spin_lock(&g_appdsp_boot);

/* APP_DSP(cpu) boot done */

spin_unlock(&g_appdsp_boot);
raw_spin_unlock(&g_appdsp_boot);

return 0;
}
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8 changes: 4 additions & 4 deletions arch/arm/src/lc823450/lc823450_cpustart.c
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Original file line number Diff line number Diff line change
Expand Up @@ -112,7 +112,7 @@ static void cpu1_boot(void)
up_enable_irq(LC823450_IRQ_SMP_CALL_01);
}

spin_unlock(&g_cpu_wait[0]);
raw_spin_unlock(&g_cpu_wait[0]);

#ifdef CONFIG_SCHED_INSTRUMENTATION
/* Notify that this CPU has started */
Expand Down Expand Up @@ -177,7 +177,7 @@ int up_cpu_start(int cpu)
tcb->adj_stack_size, CPU1_VECTOR_ISTACK);
putreg32((uint32_t)cpu1_boot, CPU1_VECTOR_RESETV);

spin_lock(&g_cpu_wait[0]);
raw_spin_lock(&g_cpu_wait[0]);

#ifdef CONFIG_SCHED_INSTRUMENTATION
/* Notify of the start event */
Expand All @@ -198,7 +198,7 @@ int up_cpu_start(int cpu)
irq_attach(LC823450_IRQ_SMP_CALL_11, lc823450_smp_call_handler, NULL);
up_enable_irq(LC823450_IRQ_SMP_CALL_11);

spin_lock(&g_cpu_wait[0]);
raw_spin_lock(&g_cpu_wait[0]);

/* CPU1 boot done */

Expand All @@ -208,7 +208,7 @@ int up_cpu_start(int cpu)
putreg32(backup[1], CPU1_VECTOR_RESETV);
putreg32(0x0, REMAP); /* remap disable */

spin_unlock(&g_cpu_wait[0]);
raw_spin_unlock(&g_cpu_wait[0]);

return 0;
}
8 changes: 4 additions & 4 deletions arch/arm/src/rp2040/rp2040_cpustart.c
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Original file line number Diff line number Diff line change
Expand Up @@ -156,7 +156,7 @@ static void core1_boot(void)
irq_attach(RP2040_SMP_CALL_PROC1, rp2040_smp_call_handler, NULL);
up_enable_irq(RP2040_SMP_CALL_PROC1);

spin_unlock(&g_core1_boot);
raw_spin_unlock(&g_core1_boot);

#ifdef CONFIG_SCHED_INSTRUMENTATION
/* Notify that this CPU has started */
Expand Down Expand Up @@ -221,7 +221,7 @@ int up_cpu_start(int cpu)
;
clrbits_reg32(RP2040_PSM_PROC1, RP2040_PSM_FRCE_OFF);

spin_lock(&g_core1_boot);
raw_spin_lock(&g_core1_boot);

/* Send initial VTOR, MSP, PC for Core 1 boot */

Expand Down Expand Up @@ -252,11 +252,11 @@ int up_cpu_start(int cpu)
irq_attach(RP2040_SMP_CALL_PROC0, rp2040_smp_call_handler, NULL);
up_enable_irq(RP2040_SMP_CALL_PROC0);

spin_lock(&g_core1_boot);
raw_spin_lock(&g_core1_boot);

/* CPU Core 1 boot done */

spin_unlock(&g_core1_boot);
raw_spin_unlock(&g_core1_boot);

return 0;
}
Expand Down
8 changes: 4 additions & 4 deletions arch/arm/src/rp23xx/rp23xx_cpustart.c
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Original file line number Diff line number Diff line change
Expand Up @@ -156,7 +156,7 @@ static void core1_boot(void)
irq_attach(RP23XX_SIO_IRQ_FIFO, rp23xx_smp_call_handler, NULL);
up_enable_irq(RP23XX_SIO_IRQ_FIFO);

spin_unlock(&g_core1_boot);
raw_spin_unlock(&g_core1_boot);

#ifdef CONFIG_SCHED_INSTRUMENTATION
/* Notify that this CPU has started */
Expand Down Expand Up @@ -221,7 +221,7 @@ int up_cpu_start(int cpu)
;
clrbits_reg32(RP23XX_PSM_PROC1, RP23XX_PSM_FRCE_OFF);

spin_lock(&g_core1_boot);
raw_spin_lock(&g_core1_boot);

/* Send initial VTOR, MSP, PC for Core 1 boot */

Expand Down Expand Up @@ -252,11 +252,11 @@ int up_cpu_start(int cpu)
irq_attach(RP23XX_SIO_IRQ_FIFO, rp23xx_smp_call_handler, NULL);
up_enable_irq(RP23XX_SIO_IRQ_FIFO);

spin_lock(&g_core1_boot);
raw_spin_lock(&g_core1_boot);

/* CPU Core 1 boot done */

spin_unlock(&g_core1_boot);
raw_spin_unlock(&g_core1_boot);

return 0;
}
Expand Down
8 changes: 4 additions & 4 deletions arch/arm/src/sam34/sam4cm_cpustart.c
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Original file line number Diff line number Diff line change
Expand Up @@ -114,7 +114,7 @@ static void cpu1_boot(void)
up_enable_irq(SAM_IRQ_SMP_CALL1);
}

spin_unlock(&g_cpu1_boot);
raw_spin_unlock(&g_cpu1_boot);

#ifdef CONFIG_SCHED_INSTRUMENTATION
/* Notify that this CPU has started */
Expand Down Expand Up @@ -209,7 +209,7 @@ int up_cpu_start(int cpu)
tcb->adj_stack_size, CPU1_VECTOR_ISTACK);
putreg32((uint32_t)cpu1_boot, CPU1_VECTOR_RESETV);

spin_lock(&g_cpu1_boot);
raw_spin_lock(&g_cpu1_boot);

/* Unreset coprocessor */

Expand All @@ -223,11 +223,11 @@ int up_cpu_start(int cpu)
irq_attach(SAM_IRQ_SMP_CALL0, sam4cm_smp_call_handler, NULL);
up_enable_irq(SAM_IRQ_SMP_CALL0);

spin_lock(&g_cpu1_boot);
raw_spin_lock(&g_cpu1_boot);

/* CPU1 boot done */

spin_unlock(&g_cpu1_boot);
raw_spin_unlock(&g_cpu1_boot);

return 0;
}
Expand Down
8 changes: 4 additions & 4 deletions arch/sparc/src/s698pm/s698pm_cpustart.c
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Original file line number Diff line number Diff line change
Expand Up @@ -79,7 +79,7 @@ void s698pm_cpu_boot(void)

s698pm_cpuint_initialize();

spin_unlock(&g_cpu_boot);
raw_spin_unlock(&g_cpu_boot);

#ifdef CONFIG_SCHED_INSTRUMENTATION
/* Notify that this CPU has started */
Expand Down Expand Up @@ -150,17 +150,17 @@ int up_cpu_start(int cpu)
regaddr = S698PM_DSU_BASE + (0x1000000 * cpu) + S698PM_DSU_NPC_OFFSET;
putreg32(0x40001004, regaddr);

spin_lock(&g_cpu_boot);
raw_spin_lock(&g_cpu_boot);

/* set 1 to bit n of multiprocessor status register to active cpu n */

putreg32(1 << cpu, S698PM_IRQREG_MPSTATUS);

spin_lock(&g_cpu_boot);
raw_spin_lock(&g_cpu_boot);

/* prev cpu boot done */

spin_unlock(&g_cpu_boot);
raw_spin_unlock(&g_cpu_boot);

return 0;
}
8 changes: 4 additions & 4 deletions arch/xtensa/src/esp32/esp32_cpustart.c
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Original file line number Diff line number Diff line change
Expand Up @@ -133,7 +133,7 @@ void IRAM_ATTR xtensa_appcpu_start(void)
*/

g_appcpu_started = true;
spin_unlock(&g_appcpu_interlock);
raw_spin_unlock(&g_appcpu_interlock);

/* Reset scheduler parameters */

Expand Down Expand Up @@ -242,7 +242,7 @@ int up_cpu_start(int cpu)
*/

spin_lock_init(&g_appcpu_interlock);
spin_lock(&g_appcpu_interlock);
raw_spin_lock(&g_appcpu_interlock);

/* Unstall the APP CPU */

Expand Down Expand Up @@ -288,11 +288,11 @@ int up_cpu_start(int cpu)

/* And wait until the APP CPU starts and releases the spinlock. */

spin_lock(&g_appcpu_interlock);
raw_spin_lock(&g_appcpu_interlock);

/* prev cpu boot done */

spin_unlock(&g_appcpu_interlock);
raw_spin_unlock(&g_appcpu_interlock);
DEBUGASSERT(g_appcpu_started);
}

Expand Down
8 changes: 4 additions & 4 deletions arch/xtensa/src/esp32s3/esp32s3_cpustart.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -132,7 +132,7 @@ void xtensa_appcpu_start(void)
*/

g_appcpu_started = true;
spin_unlock(&g_appcpu_interlock);
raw_spin_unlock(&g_appcpu_interlock);

/* Reset scheduler parameters */

Expand Down Expand Up @@ -227,7 +227,7 @@ int up_cpu_start(int cpu)
*/

spin_lock_init(&g_appcpu_interlock);
spin_lock(&g_appcpu_interlock);
raw_spin_lock(&g_appcpu_interlock);

/* OpenOCD might have already enabled clock gating and taken APP CPU
* out of reset. Don't reset the APP CPU if that's the case as this
Expand Down Expand Up @@ -272,11 +272,11 @@ int up_cpu_start(int cpu)

/* And wait until the APP CPU starts and releases the spinlock. */

spin_lock(&g_appcpu_interlock);
raw_spin_lock(&g_appcpu_interlock);

/* prev cpu boot done */

spin_unlock(&g_appcpu_interlock);
raw_spin_unlock(&g_appcpu_interlock);
DEBUGASSERT(g_appcpu_started);
}

Expand Down

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