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Multi-partition backup factory values #207

Merged
merged 25 commits into from
Jul 29, 2024
+82 −42
Merged

Multi-partition backup factory values #207

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bba708e
write and read eeprom
ligenxxxx Jul 10, 2024
893cdf9
only read eeprom
ligenxxxx Jul 11, 2024
ef857ab
Update mcu.c
ligenxxxx Jul 15, 2024
55ac1a8
debug i2c read
ligenxxxx Jul 15, 2024
91befcb
check nack and return when i2c read
ligenxxxx Jul 15, 2024
f450978
.
ligenxxxx Jul 16, 2024
d4828ef
add i2c_en
ligenxxxx Jul 17, 2024
3403875
Check eeprom data integrity
ligenxxxx Jul 17, 2024
2f9dac9
Merge branch 'check_eeprom' into write_eeprom
ligenxxxx Jul 17, 2024
357dab6
.
ligenxxxx Jul 17, 2024
53d12a5
clear debug code
ligenxxxx Jul 17, 2024
8aa4387
Merge branch 'check_eeprom' into write_eeprom
ligenxxxx Jul 17, 2024
246375f
.
ligenxxxx Jul 17, 2024
5bde997
fix check_eeprom()
ligenxxxx Jul 19, 2024
203def0
more strict I2C_EN
ligenxxxx Jul 19, 2024
60e8821
add I2C_EN
ligenxxxx Jul 22, 2024
0c5da53
check eeprom
ligenxxxx Jul 23, 2024
e749b52
clear dirty code
ligenxxxx Jul 24, 2024
5c4ea4b
wait 500ms before cpu_init
ligenxxxx Jul 26, 2024
b816844
modify table_power init value
ligenxxxx Jul 26, 2024
5ac1727
clean dirty code
ligenxxxx Jul 26, 2024
56a9554
remove debug print
ligenxxxx Jul 27, 2024
d3d663a
Restore uart baudrate
ligenxxxx Jul 27, 2024
8a5bcc2
update table_power default value
ligenxxxx Jul 29, 2024
ddd9d49
Merge branch 'main' into write_eeprom
ligenxxxx Jul 29, 2024
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Merge branch 'main' into write_eeprom
@ligenxxxx
ligenxxxx authored Jul 29, 2024
commit ddd9d495a69c78eefec1256e1dbe450f9b8323f2
162 changes: 0 additions & 162 deletions src/hardware.c
View file
Original file line number Diff line number Diff line change
@@ -1772,165 +1772,3 @@ uint8_t check_uart_loopback() {
}
}
#endif

#if (0)
void _outstring(char *string) {
uint8_t i = 0;
for (i = 0; i < 128; i++) {
if (string[i] == 0)
break;
else
_outchar(string[i]);
}
}
#endif
void check_eeprom() {
const uint8_t tab_base_address[3] = {
EEP_ADDR_TAB1,
EEP_ADDR_TAB2,
EEP_ADDR_TAB3,
};
const uint8_t dcoc_base_address[3] = {
EEP_ADDR_DCOC1,
EEP_ADDR_DCOC2,
EEP_ADDR_DCOC3,
};
const uint8_t tab_range[2] = {20, 160};
const uint8_t dcoc_range[2] = {80, 180};

uint8_t tab_list[3][FREQ_NUM_INTERNAL][POWER_MAX + 1];
uint8_t dcoc_list[3][5];
uint8_t ff_cnt[3];
uint8_t i, j, k;

// read all 3 table_power partitions
for (i = 0; i < 3; i++) {
ff_cnt[i] = 0;
for (j = 0; j < FREQ_NUM_INTERNAL; j++) {
for (k = 0; k < POWER_MAX + 1; k++) {
tab_list[i][j][k] = I2C_Read8(ADDR_EEPROM, tab_base_address[i] + j * (POWER_MAX + 1) + k);
ff_cnt[i] += (tab_list[i][j][k] == 0xff);
}
}
}

#if (0)
// If eeprom is new, init partition 0 with default table_power
if (ff_cnt[0] == (FREQ_NUM_INTERNAL * (POWER_MAX + 1))) {
for (j = 0; j < FREQ_NUM_INTERNAL; j++) {
for (k = 0; k < POWER_MAX + 1; k++) {
I2C_Write8_Wait(10, ADDR_EEPROM, tab_base_address[0] + j * (POWER_MAX + 1) + k, table_power[j][k]);
}
}
_outstring("\r\nInit tab partition 0");
}
#endif

// Init partition 1/2 by copy paratition 0 if is needed (one time)
if ((ff_cnt[1] + ff_cnt[2]) > (FREQ_NUM_INTERNAL * (POWER_MAX + 1))) {
for (i = 1; i < 3; i++) {
for (j = 0; j < FREQ_NUM_INTERNAL; j++) {
for (k = 0; k < POWER_MAX + 1; k++) {
I2C_Write8_Wait(10, ADDR_EEPROM, tab_base_address[i] + j * (POWER_MAX + 1) + k, tab_list[0][j][k]);
tab_list[i][j][k] = tab_list[0][j][k];
}
}
}
//_outstring("\r\nInit tab partition 1, 2");
}

// Check the validity of each value
for (i = 0; i < FREQ_NUM_INTERNAL; i++) {
for (j = 0; j < POWER_MAX + 1; j++) {
if (tab_list[0][i][j] == tab_list[1][i][j] && tab_list[1][i][j] == tab_list[2][i][j] && tab_list[0][i][j] > tab_range[0] && tab_list[0][i][j] < tab_range[1])
// all partition are right
;
else if (tab_list[0][i][j] == tab_list[1][i][j] && tab_list[1][i][j] != tab_list[2][i][j] && tab_list[0][i][j] > tab_range[0] && tab_list[0][i][j] < tab_range[1]) {
// partition 2 value is error
I2C_Write8_Wait(10, ADDR_EEPROM, tab_base_address[2] + i * (POWER_MAX + 1) + j, tab_list[0][i][j]);
//_outstring("\r\ntab2:");
// _outchar('0' + i);
//_outchar('0' + j);
} else if (tab_list[0][i][j] == tab_list[2][i][j] && tab_list[1][i][j] != tab_list[2][i][j] && tab_list[0][i][j] > tab_range[0] && tab_list[0][i][j] < tab_range[1]) {
// partition 1 value is error
I2C_Write8_Wait(10, ADDR_EEPROM, tab_base_address[1] + i * (POWER_MAX + 1) + j, tab_list[0][i][j]);
//_outstring("\r\ntab1:");
//_outchar('0' + i);
//_outchar('0' + j);
} else if (tab_list[0][i][j] != tab_list[2][i][j] && tab_list[1][i][j] == tab_list[2][i][j] && tab_list[1][i][j] > tab_range[0] && tab_list[1][i][j] < tab_range[1]) {
// partition 0 value is error
I2C_Write8_Wait(10, ADDR_EEPROM, tab_base_address[0] + i * (POWER_MAX + 1) + j, tab_list[1][i][j]);
//_outstring("\r\ntab0:");
//_outchar('0' + i);
//_outchar('0' + j);
} else {
I2C_Write8_Wait(10, ADDR_EEPROM, tab_base_address[0] + i * (POWER_MAX + 1) + j, table_power[i][j]);
I2C_Write8_Wait(10, ADDR_EEPROM, tab_base_address[1] + i * (POWER_MAX + 1) + j, table_power[i][j]);
I2C_Write8_Wait(10, ADDR_EEPROM, tab_base_address[2] + i * (POWER_MAX + 1) + j, table_power[i][j]);
//_outstring("\r\n tab all:");
//_outchar('0' + i);
//_outchar('0' + j);
}
}
}

// read all 3 dcoc partitions
for (i = 0; i < 3; i++) {
ff_cnt[i] = 0;
for (j = 0; j < 5; j++) {
dcoc_list[i][j] = I2C_Read8(ADDR_EEPROM, dcoc_base_address[i] + j);
ff_cnt[i] += (dcoc_list[i][j] == 0xff);
}
}

if (ff_cnt[0] == 3)
return;
// Init partition 1/2 by copy paratition 0 if is needed (one time)
if ((ff_cnt[1] + ff_cnt[2]) > 5) {
for (i = 1; i < 3; i++) {
for (j = 0; j < 5; j++) {
I2C_Write8_Wait(10, ADDR_EEPROM, dcoc_base_address[i] + j, dcoc_list[0][j]);
dcoc_list[i][j] = dcoc_list[0][j];
}
}
//_outstring("\r\nInit dcoc partition 1, 2");
}

// Check the validity of each value
if (dcoc_list[0][0] == dcoc_list[1][0] && dcoc_list[1][0] == dcoc_list[2][0] && dcoc_list[0][0] == 0x00) {
;
} else {
I2C_Write8_Wait(10, ADDR_EEPROM, dcoc_base_address[0], 0);
I2C_Write8_Wait(10, ADDR_EEPROM, dcoc_base_address[1], 0);
I2C_Write8_Wait(10, ADDR_EEPROM, dcoc_base_address[2], 0);
//_outstring("\r\ndcoc en err");
}

for (i = 1; i < 5; i++) {
if (dcoc_list[0][i] == dcoc_list[1][i] && dcoc_list[1][i] == dcoc_list[2][i] && dcoc_list[0][i] > dcoc_range[0] && dcoc_list[0][i] < dcoc_range[1])
// all partition are right
;
else if (dcoc_list[0][i] == dcoc_list[1][i] && dcoc_list[1][i] != dcoc_list[2][i] && dcoc_list[0][i] > dcoc_range[0] && dcoc_list[0][i] < dcoc_range[1]) {
// partition 2 value is error
I2C_Write8_Wait(10, ADDR_EEPROM, dcoc_base_address[2] + i, dcoc_list[0][i]);
//_outstring("\r\ndcoc2:");
//_outchar('0' + i);
} else if (dcoc_list[0][i] != dcoc_list[1][i] && dcoc_list[1][i] == dcoc_list[2][i] && dcoc_list[1][i] > dcoc_range[0] && dcoc_list[1][i] < dcoc_range[1]) {
// partition 0 value is error
I2C_Write8_Wait(10, ADDR_EEPROM, dcoc_base_address[0] + i, dcoc_list[1][i]);
//_outstring("\r\ndcoc0:");
//_outchar('0' + i);
} else if (dcoc_list[0][i] != dcoc_list[1][i] && dcoc_list[0][i] == dcoc_list[2][i] && dcoc_list[0][i] > dcoc_range[0] && dcoc_list[0][i] < dcoc_range[1]) {
// partition 1 value is error
I2C_Write8_Wait(10, ADDR_EEPROM, dcoc_base_address[1] + i, dcoc_list[0][i]);
//_outstring("\r\ndcoc1:");
//_outchar('0' + i);
} else {
I2C_Write8_Wait(10, ADDR_EEPROM, dcoc_base_address[0] + i, 128);
I2C_Write8_Wait(10, ADDR_EEPROM, dcoc_base_address[1] + i, 128);
I2C_Write8_Wait(10, ADDR_EEPROM, dcoc_base_address[2] + i, 128);
//_outstring("\r\ndcoc all:");
//_outchar('0' + i);
}
}
}
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