add test for lb

hazel-sudz · Jan 11, 2024 · e7075df · e7075df
1 parent 9213dfc
commit e7075df
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Showing 7 changed files with 105 additions and 5 deletions.
diff --git a/src/asm/ari_2.s b/src/asm/ari_2.s
@@ -69,6 +69,9 @@ auipc   x22, 2048 #8388608+216=8388824
 lui     x23, 42069 #172314624
 nop
 
+trap:
+beq x0, x0, trap
+
 |---------------------------------------|
 | Register File State                   |
 |---------------------------------------|

diff --git a/src/asm/lb.s b/src/asm/lb.s
@@ -0,0 +1,41 @@
+addi  x1, x0, 1040             # x01 = 1040 (16 + 1024)
+addi  x2, x0, 1024             # x02 = 1024 
+sb  x1, 0(x2)                  # (MEM:1024) = 16
+lb  x3, 0(x2)                  # x03 = 16
+
+#TESTASSERTOUTPUT|---------------------------------------|
+#TESTASSERTOUTPUT| Register File State :)                |
+#TESTASSERTOUTPUT|---------------------------------------|
+#TESTASSERTOUTPUT|    x00, zero = 0x00000000 (         0)|
+#TESTASSERTOUTPUT|      x01, ra = 0x00000410 (      1040)|
+#TESTASSERTOUTPUT|      x02, sp = 0x00000400 (      1024)|
+#TESTASSERTOUTPUT|      x03, gp = 0x00000010 (        16)|
+#TESTASSERTOUTPUT|      x04, tp = 0x00000000 (         0)|
+#TESTASSERTOUTPUT|      x05, t0 = 0x00000000 (         0)|
+#TESTASSERTOUTPUT|      x06, t1 = 0x00000000 (         0)|
+#TESTASSERTOUTPUT|      x07, t2 = 0x00000000 (         0)|
+#TESTASSERTOUTPUT|      x08, s0 = 0x00000000 (         0)|
+#TESTASSERTOUTPUT|      x09, s1 = 0x00000000 (         0)|
+#TESTASSERTOUTPUT|      x10, a0 = 0x00000000 (         0)|
+#TESTASSERTOUTPUT|      x11, a1 = 0x00000000 (         0)|
+#TESTASSERTOUTPUT|      x12, a2 = 0x00000000 (         0)|
+#TESTASSERTOUTPUT|      x13, a3 = 0x00000000 (         0)|
+#TESTASSERTOUTPUT|      x14, a4 = 0x00000000 (         0)|
+#TESTASSERTOUTPUT|      x15, a5 = 0x00000000 (         0)|
+#TESTASSERTOUTPUT|      x16, a6 = 0x00000000 (         0)|
+#TESTASSERTOUTPUT|      x17, a7 = 0x00000000 (         0)|
+#TESTASSERTOUTPUT|      x18, s2 = 0x00000000 (         0)|
+#TESTASSERTOUTPUT|      x19, s3 = 0x00000000 (         0)|
+#TESTASSERTOUTPUT|      x20, s4 = 0x00000000 (         0)|
+#TESTASSERTOUTPUT|      x21, s5 = 0x00000000 (         0)|
+#TESTASSERTOUTPUT|      x22, s6 = 0x00000000 (         0)|
+#TESTASSERTOUTPUT|      x23, s7 = 0x00000000 (         0)|
+#TESTASSERTOUTPUT|      x24, s8 = 0x00000000 (         0)|
+#TESTASSERTOUTPUT|      x25, s9 = 0x00000000 (         0)|
+#TESTASSERTOUTPUT|     x26, s10 = 0x00000000 (         0)|
+#TESTASSERTOUTPUT|     x27, s11 = 0x00000000 (         0)|
+#TESTASSERTOUTPUT|      x28, t3 = 0x00000000 (         0)|
+#TESTASSERTOUTPUT|      x29, t4 = 0x00000000 (         0)|
+#TESTASSERTOUTPUT|      x30, t5 = 0x00000000 (         0)|
+#TESTASSERTOUTPUT|      x31, t6 = 0x00000000 (         0)|
+#TESTASSERTOUTPUT|---------------------------------------|
diff --git a/src/asm/out/ari_2.memh b/src/asm/out/ari_2.memh
@@ -55,3 +55,4 @@ ffd8a823 // PC=0x80 line=38: sw      x29, -16(x17)   #420
 00800b17 // PC=0xd8 line=68: auipc   x22, 2048 #8388608+216=8388824
 0a455bb7 // PC=0xdc line=69: lui     x23, 42069 #172314624
 00000013 // PC=0xe0 line=70: nop
+00000063 // PC=0xe4 line=73: beq x0, x0, trap
diff --git a/src/asm/out/lb.memh b/src/asm/out/lb.memh
@@ -0,0 +1,4 @@
+41000093 // PC=0x0 line=1: addi  x1, x0, 1040             # x01 = 1040 (16 + 1024)
+40000113 // PC=0x4 line=2: addi  x2, x0, 1024             # x02 = 1024
+00110023 // PC=0x8 line=3: sb  x1, 0(x2)                  # (MEM:1024) = 16
+00010183 // PC=0xc line=4: lb  x3, 0(x2)                  # x03 = 16
diff --git a/src/asm/test/ari_2.result b/src/asm/test/ari_2.result
@@ -11,7 +11,7 @@ Usage:
 WARNING: ./tests/provided/bytewise_distributed_ram.sv:58: $readmemh(../asm/out/ari_2.memh): Not enough words in the file for the requested range [0:1023].
 Running simulation of memory ../asm/out/ari_2.memh for up to       10000 cycles. Waves will be stored to rv32_simulator.fst.
 FST info: dumpfile rv32_simulator.fst opened for output.
-Ran       10000 cycles, finishing.
+!!! Infinite loop detected (over   4 iterations) - ending sim !!!
 #TESTASSERTOUTPUT|---------------------------------------|
 #TESTASSERTOUTPUT| Register File State :)                |
 #TESTASSERTOUTPUT|---------------------------------------|
@@ -36,9 +36,9 @@ Ran       10000 cycles, finishing.
 #TESTASSERTOUTPUT|      x18, s2 = 0x00000006 (         6)|
 #TESTASSERTOUTPUT|      x19, s3 = 0xfffffff0 (       -16)|
 #TESTASSERTOUTPUT|      x20, s4 = 0x00000001 (         1)|
-#TESTASSERTOUTPUT|      x21, s5 = 0x00000000 (         0)|
-#TESTASSERTOUTPUT|      x22, s6 = 0x00000023 (        35)|
-#TESTASSERTOUTPUT|      x23, s7 = 0xfffffffc (        -4)|
+#TESTASSERTOUTPUT|      x21, s5 = 0x000000d4 (       212)|
+#TESTASSERTOUTPUT|      x22, s6 = 0x008000d8 (   8388824)|
+#TESTASSERTOUTPUT|      x23, s7 = 0x0a455000 ( 172314624)|
 #TESTASSERTOUTPUT|      x24, s8 = 0x93130104 (-1827471100)|
 #TESTASSERTOUTPUT|      x25, s9 = 0x00000104 (       260)|
 #TESTASSERTOUTPUT|     x26, s10 = 0x00000045 (        69)|

diff --git a/src/asm/test/lb.result b/src/asm/test/lb.result
@@ -0,0 +1,50 @@
+Usage:
+ ./rv32_simulator +initial_memory=path/to/memh/file
+  Additional arguments:
+    +initial_memory=path/to/memh/file
+        Required: path to a memh file that containes the assembled binary to run.
+    +max_cycles=NUMBER_OF_CYCLES_TO_RUN
+    +wave_fn=path/to/wave/file
+        default is rv32_simulator.fst
+    +final_memory=path/to/memh/file
+        If provided, the final memory contents will be saved here. Use this to debug your store instructions.
+WARNING: ./tests/provided/bytewise_distributed_ram.sv:58: $readmemh(../asm/out/lb.memh): Not enough words in the file for the requested range [0:1023].
+Running simulation of memory ../asm/out/lb.memh for up to       10000 cycles. Waves will be stored to rv32_simulator.fst.
+FST info: dumpfile rv32_simulator.fst opened for output.
+Ran       10000 cycles, finishing.
+#TESTASSERTOUTPUT|---------------------------------------|
+#TESTASSERTOUTPUT| Register File State :)                |
+#TESTASSERTOUTPUT|---------------------------------------|
+#TESTASSERTOUTPUT|    x00, zero = 0x00000000 (         0)|
+#TESTASSERTOUTPUT|      x01, ra = 0x00000410 (      1040)|
+#TESTASSERTOUTPUT|      x02, sp = 0x00000400 (      1024)|
+#TESTASSERTOUTPUT|      x03, gp = 0x00000010 (        16)|
+#TESTASSERTOUTPUT|      x04, tp = 0x00000000 (         0)|
+#TESTASSERTOUTPUT|      x05, t0 = 0x00000000 (         0)|
+#TESTASSERTOUTPUT|      x06, t1 = 0x00000000 (         0)|
+#TESTASSERTOUTPUT|      x07, t2 = 0x00000000 (         0)|
+#TESTASSERTOUTPUT|      x08, s0 = 0x00000000 (         0)|
+#TESTASSERTOUTPUT|      x09, s1 = 0x00000000 (         0)|
+#TESTASSERTOUTPUT|      x10, a0 = 0x00000000 (         0)|
+#TESTASSERTOUTPUT|      x11, a1 = 0x00000000 (         0)|
+#TESTASSERTOUTPUT|      x12, a2 = 0x00000000 (         0)|
+#TESTASSERTOUTPUT|      x13, a3 = 0x00000000 (         0)|
+#TESTASSERTOUTPUT|      x14, a4 = 0x00000000 (         0)|
+#TESTASSERTOUTPUT|      x15, a5 = 0x00000000 (         0)|
+#TESTASSERTOUTPUT|      x16, a6 = 0x00000000 (         0)|
+#TESTASSERTOUTPUT|      x17, a7 = 0x00000000 (         0)|
+#TESTASSERTOUTPUT|      x18, s2 = 0x00000000 (         0)|
+#TESTASSERTOUTPUT|      x19, s3 = 0x00000000 (         0)|
+#TESTASSERTOUTPUT|      x20, s4 = 0x00000000 (         0)|
+#TESTASSERTOUTPUT|      x21, s5 = 0x00000000 (         0)|
+#TESTASSERTOUTPUT|      x22, s6 = 0x00000000 (         0)|
+#TESTASSERTOUTPUT|      x23, s7 = 0x00000000 (         0)|
+#TESTASSERTOUTPUT|      x24, s8 = 0x00000000 (         0)|
+#TESTASSERTOUTPUT|      x25, s9 = 0x00000000 (         0)|
+#TESTASSERTOUTPUT|     x26, s10 = 0x00000000 (         0)|
+#TESTASSERTOUTPUT|     x27, s11 = 0x00000000 (         0)|
+#TESTASSERTOUTPUT|      x28, t3 = 0x00000000 (         0)|
+#TESTASSERTOUTPUT|      x29, t4 = 0x00000000 (         0)|
+#TESTASSERTOUTPUT|      x30, t5 = 0x00000000 (         0)|
+#TESTASSERTOUTPUT|      x31, t6 = 0x00000000 (         0)|
+#TESTASSERTOUTPUT|---------------------------------------|
diff --git a/src/components/Makefile b/src/components/Makefile
@@ -109,9 +109,10 @@ test_rv32_ir_types: addi.validate itypes.validate irtypes.validate
 test_rv32_utypes: utypes.validate
 test_rv32_branch: beq.validate bne.validate blt.validate bge.validate bgeu.validate bltu.validate
 test_rv32_jal: jal_jalr.validate
+test_rv32_load: storeload.validate lb.validate
 test_rv32_integrated: ari_1.validate ari_2.validate
 
-test_rv32_all: test_rv32_ir_types storeload.validate test_rv32_branch test_rv32_jal test_rv32_utypes test_rv32_integrated
+test_rv32_all: test_rv32_ir_types test_rv32_load test_rv32_branch test_rv32_jal test_rv32_utypes test_rv32_integrated
 
 # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # #
 # Instruction Type Tests