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add a bunch of branch unit tests (#15)
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* add beq and bne test

* finish all the branch tests
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@hazel-sudz
hazel-sudz authored Jan 10, 2024
1 parent 188b66a commit 43b0a48
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Showing 24 changed files with 662 additions and 19 deletions.
48 changes: 43 additions & 5 deletions src/asm/beq.s
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Original file line number Diff line number Diff line change
@@ -1,9 +1,47 @@
addi x1, x0, 5 # x01 = 5

addi x8, x0, 0 # x08 = 0
addi x2, x0, 0 # x02 = 0
loop_head:
addi x8, x8, 1 # x08 ++
beq x8, x1, loop_end
addi x2, x2, 1 # x02 ++
beq x2, x1, trap
beq x0, x0, loop_head
loop_end:
# x08 = 5
# x02 = 5

trap:

#TESTASSERTOUTPUT|---------------------------------------|
#TESTASSERTOUTPUT| Register File State :) |
#TESTASSERTOUTPUT|---------------------------------------|
#TESTASSERTOUTPUT| x00, zero = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x01, ra = 0x00000005 ( 5)|
#TESTASSERTOUTPUT| x02, sp = 0x00000005 ( 5)|
#TESTASSERTOUTPUT| x03, gp = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x04, tp = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x05, t0 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x06, t1 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x07, t2 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x08, s0 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x09, s1 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x10, a0 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x11, a1 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x12, a2 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x13, a3 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x14, a4 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x15, a5 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x16, a6 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x17, a7 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x18, s2 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x19, s3 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x20, s4 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x21, s5 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x22, s6 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x23, s7 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x24, s8 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x25, s9 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x26, s10 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x27, s11 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x28, t3 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x29, t4 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x30, t5 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x31, t6 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT|---------------------------------------|
48 changes: 48 additions & 0 deletions src/asm/bge.s
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Original file line number Diff line number Diff line change
@@ -0,0 +1,48 @@
addi x1, x0, 6 # x01 = 6

addi x2, x0, 10 # x02 = 10
loop_head:
addi x2, x2, -1 # x02--
bge x2, x1, loop_head
beq x0, x0, trap
# x02 = 5

trap:


#TESTASSERTOUTPUT|---------------------------------------|
#TESTASSERTOUTPUT| Register File State :) |
#TESTASSERTOUTPUT|---------------------------------------|
#TESTASSERTOUTPUT| x00, zero = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x01, ra = 0x00000006 ( 6)|
#TESTASSERTOUTPUT| x02, sp = 0x00000005 ( 5)|
#TESTASSERTOUTPUT| x03, gp = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x04, tp = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x05, t0 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x06, t1 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x07, t2 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x08, s0 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x09, s1 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x10, a0 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x11, a1 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x12, a2 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x13, a3 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x14, a4 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x15, a5 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x16, a6 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x17, a7 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x18, s2 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x19, s3 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x20, s4 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x21, s5 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x22, s6 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x23, s7 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x24, s8 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x25, s9 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x26, s10 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x27, s11 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x28, t3 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x29, t4 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x30, t5 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x31, t6 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT|---------------------------------------|
48 changes: 48 additions & 0 deletions src/asm/bgeu.s
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Original file line number Diff line number Diff line change
@@ -0,0 +1,48 @@
addi x1, x0, 6 # x01 = 6

addi x2, x0, 10 # x02 = 10
loop_head:
addi x2, x2, -1 # x02--
bgeu x2, x1, loop_head
beq x0, x0, trap
# x02 = 5

trap:


#TESTASSERTOUTPUT|---------------------------------------|
#TESTASSERTOUTPUT| Register File State :) |
#TESTASSERTOUTPUT|---------------------------------------|
#TESTASSERTOUTPUT| x00, zero = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x01, ra = 0x00000006 ( 6)|
#TESTASSERTOUTPUT| x02, sp = 0x00000005 ( 5)|
#TESTASSERTOUTPUT| x03, gp = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x04, tp = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x05, t0 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x06, t1 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x07, t2 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x08, s0 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x09, s1 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x10, a0 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x11, a1 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x12, a2 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x13, a3 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x14, a4 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x15, a5 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x16, a6 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x17, a7 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x18, s2 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x19, s3 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x20, s4 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x21, s5 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x22, s6 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x23, s7 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x24, s8 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x25, s9 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x26, s10 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x27, s11 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x28, t3 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x29, t4 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x30, t5 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x31, t6 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT|---------------------------------------|
48 changes: 48 additions & 0 deletions src/asm/blt.s
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Original file line number Diff line number Diff line change
@@ -0,0 +1,48 @@
addi x1, x0, 5 # x01 = 5

addi x2, x0, 0 # x02 = 0
loop_head:
addi x2, x2, 1 # x02 ++
blt x2, x1, loop_head
beq x0, x0, trap
# x02 = 5

trap:


#TESTASSERTOUTPUT|---------------------------------------|
#TESTASSERTOUTPUT| Register File State :) |
#TESTASSERTOUTPUT|---------------------------------------|
#TESTASSERTOUTPUT| x00, zero = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x01, ra = 0x00000005 ( 5)|
#TESTASSERTOUTPUT| x02, sp = 0x00000005 ( 5)|
#TESTASSERTOUTPUT| x03, gp = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x04, tp = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x05, t0 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x06, t1 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x07, t2 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x08, s0 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x09, s1 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x10, a0 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x11, a1 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x12, a2 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x13, a3 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x14, a4 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x15, a5 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x16, a6 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x17, a7 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x18, s2 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x19, s3 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x20, s4 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x21, s5 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x22, s6 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x23, s7 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x24, s8 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x25, s9 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x26, s10 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x27, s11 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x28, t3 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x29, t4 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x30, t5 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x31, t6 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT|---------------------------------------|
48 changes: 48 additions & 0 deletions src/asm/bltu.s
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Original file line number Diff line number Diff line change
@@ -0,0 +1,48 @@
addi x1, x0, 5 # x01 = 5

addi x2, x0, 0 # x02 = 0
loop_head:
addi x2, x2, 1 # x02 ++
bltu x2, x1, loop_head
beq x0, x0, trap
# x02 = 5

trap:


#TESTASSERTOUTPUT|---------------------------------------|
#TESTASSERTOUTPUT| Register File State :) |
#TESTASSERTOUTPUT|---------------------------------------|
#TESTASSERTOUTPUT| x00, zero = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x01, ra = 0x00000005 ( 5)|
#TESTASSERTOUTPUT| x02, sp = 0x00000005 ( 5)|
#TESTASSERTOUTPUT| x03, gp = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x04, tp = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x05, t0 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x06, t1 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x07, t2 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x08, s0 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x09, s1 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x10, a0 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x11, a1 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x12, a2 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x13, a3 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x14, a4 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x15, a5 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x16, a6 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x17, a7 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x18, s2 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x19, s3 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x20, s4 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x21, s5 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x22, s6 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x23, s7 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x24, s8 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x25, s9 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x26, s10 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x27, s11 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x28, t3 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x29, t4 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x30, t5 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x31, t6 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT|---------------------------------------|
47 changes: 47 additions & 0 deletions src/asm/bne.s
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Original file line number Diff line number Diff line change
@@ -0,0 +1,47 @@
addi x1, x0, 5 # x01 = 5

addi x2, x0, 0 # x02 = 0
loop_head:
addi x2, x2, 1 # x02 ++
bne x2, x1, loop_head
beq x0, x0, trap
# x02 = 5

trap:

#TESTASSERTOUTPUT|---------------------------------------|
#TESTASSERTOUTPUT| Register File State :) |
#TESTASSERTOUTPUT|---------------------------------------|
#TESTASSERTOUTPUT| x00, zero = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x01, ra = 0x00000005 ( 5)|
#TESTASSERTOUTPUT| x02, sp = 0x00000005 ( 5)|
#TESTASSERTOUTPUT| x03, gp = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x04, tp = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x05, t0 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x06, t1 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x07, t2 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x08, s0 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x09, s1 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x10, a0 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x11, a1 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x12, a2 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x13, a3 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x14, a4 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x15, a5 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x16, a6 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x17, a7 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x18, s2 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x19, s3 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x20, s4 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x21, s5 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x22, s6 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x23, s7 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x24, s8 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x25, s9 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x26, s10 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x27, s11 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x28, t3 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x29, t4 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x30, t5 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x31, t6 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT|---------------------------------------|
8 changes: 4 additions & 4 deletions src/asm/out/beq.memh
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Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
00500093 // PC=0x0 line=1: addi x1, x0, 5 # x01 = 5
00000413 // PC=0x4 line=3: addi x8, x0, 0 # x08 = 0
00140413 // PC=0x8 line=5: addi x8, x8, 1 # x08 ++
00140463 // PC=0xc line=6: beq x8, x1, loop_end
fe000ce3 // PC=0x10 line=7: beq x0, x0, loop_head
00000113 // PC=0x4 line=3: addi x2, x0, 0 # x02 = 0
00110113 // PC=0x8 line=5: addi x2, x2, 1 # x02 ++
00110463 // PC=0xc line=6: beq x2, x1, trap
fe000ce3 // PC=0x10 line=7: beq x0, x0, loop_head_beq
5 changes: 5 additions & 0 deletions src/asm/out/bge.memh
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Original file line number Diff line number Diff line change
@@ -0,0 +1,5 @@
00600093 // PC=0x0 line=1: addi x1, x0, 6 # x01 = 6
00a00113 // PC=0x4 line=3: addi x2, x0, 10 # x02 = 10
fff10113 // PC=0x8 line=5: addi x2, x2, -1 # x02--
fe115ee3 // PC=0xc line=6: bge x2, x1, loop_head
00000263 // PC=0x10 line=7: beq x0, x0, trap
5 changes: 5 additions & 0 deletions src/asm/out/bgeu.memh
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Original file line number Diff line number Diff line change
@@ -0,0 +1,5 @@
00600093 // PC=0x0 line=1: addi x1, x0, 6 # x01 = 6
00a00113 // PC=0x4 line=3: addi x2, x0, 10 # x02 = 10
fff10113 // PC=0x8 line=5: addi x2, x2, -1 # x02--
fe117ee3 // PC=0xc line=6: bgeu x2, x1, loop_head
00000263 // PC=0x10 line=7: beq x0, x0, trap
5 changes: 5 additions & 0 deletions src/asm/out/blt.memh
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Original file line number Diff line number Diff line change
@@ -0,0 +1,5 @@
00500093 // PC=0x0 line=1: addi x1, x0, 5 # x01 = 5
00000113 // PC=0x4 line=3: addi x2, x0, 0 # x02 = 0
00110113 // PC=0x8 line=5: addi x2, x2, 1 # x02 ++
fe114ee3 // PC=0xc line=6: blt x2, x1, loop_head_blt
00000263 // PC=0x10 line=7: beq x0, x0, trap
5 changes: 5 additions & 0 deletions src/asm/out/bltu.memh
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Original file line number Diff line number Diff line change
@@ -0,0 +1,5 @@
00500093 // PC=0x0 line=1: addi x1, x0, 5 # x01 = 5
00000113 // PC=0x4 line=3: addi x2, x0, 0 # x02 = 0
00110113 // PC=0x8 line=5: addi x2, x2, 1 # x02 ++
fe116ee3 // PC=0xc line=6: bltu x2, x1, loop_head
00000263 // PC=0x10 line=7: beq x0, x0, trap
5 changes: 5 additions & 0 deletions src/asm/out/bne.memh
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Original file line number Diff line number Diff line change
@@ -0,0 +1,5 @@
00500093 // PC=0x0 line=1: addi x1, x0, 5 # x01 = 5
00000113 // PC=0x4 line=3: addi x2, x0, 0 # x02 = 0
00110113 // PC=0x8 line=5: addi x2, x2, 1 # x02 ++
fe111ee3 // PC=0xc line=6: bne x2, x1, loop_head_bneq
00000263 // PC=0x10 line=7: beq x0, x0, trap
9 changes: 9 additions & 0 deletions src/asm/out/branch.memh
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Original file line number Diff line number Diff line change
@@ -0,0 +1,9 @@
00500093 // PC=0x0 line=1: addi x1, x0, 5 # x01 = 5
00000113 // PC=0x4 line=3: addi x2, x0, 0 # x02 = 0
00110113 // PC=0x8 line=5: addi x2, x2, 1 # x02 ++
00110c63 // PC=0xc line=6: beq x2, x1, trap
fe000ce3 // PC=0x10 line=7: beq x0, x0, loop_head_beq
00000193 // PC=0x14 line=10: addi x3, x0, 0 # x03 = 0
00118193 // PC=0x18 line=12: addi x3, x3, 1 # x03 ++
fe119ee3 // PC=0x1c line=13: bne x3, x1, loop_head_bneq
00000263 // PC=0x20 line=14: beq x0, x0, trap
6 changes: 3 additions & 3 deletions src/asm/test/beq.result
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Original file line number Diff line number Diff line change
Expand Up @@ -17,13 +17,13 @@ Ran 10000 cycles, finishing.
#TESTASSERTOUTPUT|---------------------------------------|
#TESTASSERTOUTPUT| x00, zero = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x01, ra = 0x00000005 ( 5)|
#TESTASSERTOUTPUT| x02, sp = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x02, sp = 0x00000005 ( 5)|
#TESTASSERTOUTPUT| x03, gp = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x04, tp = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x05, t0 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x06, t1 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x07, t2 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x08, s0 = 0x00000008 ( 8)|
#TESTASSERTOUTPUT| x08, s0 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x09, s1 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x10, a0 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x11, a1 = 0x00000000 ( 0)|
Expand All @@ -40,7 +40,7 @@ Ran 10000 cycles, finishing.
#TESTASSERTOUTPUT| x22, s6 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x23, s7 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x24, s8 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x25, s9 = 0x00000008 ( 8)|
#TESTASSERTOUTPUT| x25, s9 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x26, s10 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x27, s11 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x28, t3 = 0x00000000 ( 0)|
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