Add SeeedStudio Spartan Edge Acceleator Board (Spartan7)

Signed-off-by: Gwenhael Goavec-Merou <[email protected]>
fusesoc · May 6, 2020 · b53f244 · b53f244
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diff --git a/README.md b/README.md
@@ -103,6 +103,10 @@ http://pipistrello.saanlima.com/index.php?title=Welcome_to_Pipistrello
 
 https://shop.trenz-electronic.de/en/TE0890-01-25-1C-S7-Mini-Fully-Open-Source-Module-with-Xilinx-Spartan-7-7S25-64-MBit-HyperRAM
 
+### spartan_edge_accelerator_board
+
+https://wiki.seeedstudio.com/Spartan-Edge-Accelerator-Board/
+
 ### tinyfpga_bx
 
 https://www.crowdsupply.com/tinyfpga/tinyfpga-bx

diff --git a/blinky.core b/blinky.core
@@ -79,6 +79,9 @@ filesets:
       - pynq_z2/blinky_pynq_z2.v : {file_type : verilogSource}
       - pynq_z2/blinky.xdc : {file_type : xdc}
 
+  spartan_edge_accelerator_board:
+    files: [spartan_edge_accelerator_board/blinky.xdc : {file_type : xdc}]
+
   tb:
     files: [blinky_tb.v : {file_type : verilogSource}]
     depend: [vlog_tb_utils]
@@ -320,6 +323,16 @@ targets:
         xelab_options: [--timescale, 1ns/1ns]
     toplevel: blinky_tb
 
+  spartan_edge_accelerator_board:
+    default_tool : vivado
+    description : Spartan Edge Accelerator Board
+    filesets : [rtl, spartan_edge_accelerator_board]
+    parameters : [clk_freq_hz=100000000]
+    tools:
+      vivado:
+        part : xc7s15ftgb196-1
+    toplevel : blinky
+
   tinyfpga_bx:
     default_tool : icestorm
     filesets : [rtl, proginfo, tinyfpga_bx]

diff --git a/spartan_edge_accelerator_board/blinky.xdc b/spartan_edge_accelerator_board/blinky.xdc
@@ -0,0 +1,6 @@
+## Clock signal
+set_property -dict { PACKAGE_PIN H4    IOSTANDARD LVCMOS33 } [get_ports { clk }];
+create_clock -add -name sys_clk_pin -period 10.00 -waveform {0 5} [get_ports {clk}];
+
+## LED
+set_property -dict { PACKAGE_PIN J1   IOSTANDARD LVCMOS33 } [get_ports { q }];