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Upstream synchronization #49

Merged
merged 55 commits into from
Jan 23, 2025
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56f53a6
Replace cache clean/invalidate by MPU config.
HiFiPhile Nov 2, 2024
54df3b2
mimxrt1170_evkb: add M4 build support.
HiFiPhile Nov 2, 2024
486e14e
Fix CI.
HiFiPhile Nov 2, 2024
c41d9db
Merge branch 'master' into rt1170
HiFiPhile Nov 30, 2024
3351c36
Restore DCache clean/invalidate.
HiFiPhile Nov 30, 2024
f2ed60e
Update audio class with dcache support.
HiFiPhile Nov 30, 2024
ae4373d
Update .gitignore
HiFiPhile Nov 30, 2024
0074ed7
Add bin & hex output to cmake targets.
HiFiPhile Nov 30, 2024
0bca377
Fix typo.
HiFiPhile Nov 30, 2024
f934224
Fix cmake options.
HiFiPhile Nov 30, 2024
0d9a24c
Fix HCD build.
HiFiPhile Nov 30, 2024
df91c12
Reformat audio class.
HiFiPhile Nov 30, 2024
3f335df
Adding HID Usage Table Physical Input Device Page (0x0F)
shdeb Dec 6, 2024
b5e84d2
change ra bsp to match fsp generated directory
hathach Dec 10, 2024
29fa07d
Merge branch 'master' into fork/HiFiPhile/rt1170
hathach Dec 11, 2024
91799b0
Merge branch 'master' into fork/HiFiPhile/rt1170
hathach Dec 11, 2024
aa1bab7
limit parallel for circleci
hathach Dec 11, 2024
69dd473
more migrate to ra smart configurator
hathach Dec 12, 2024
8f2b1bc
used pin generated by rasc
hathach Dec 12, 2024
f294400
rasc for ra4m3 ek
hathach Dec 12, 2024
ec1c8b9
rasc for ra4m1_ek
hathach Dec 12, 2024
4d1f945
rasc ra2a1_ek, but usb does not seem to work. Note fsp.ld need extra …
hathach Dec 12, 2024
ec2f2f3
rasc for portenta_c33
hathach Dec 12, 2024
4b39ecc
update make build for ra
hathach Dec 13, 2024
c79890c
ra8m1_ek led and button works
hathach Dec 13, 2024
0785dae
update build for ra8m1: usbfs work, but usbhs not working just yet. P…
hathach Dec 13, 2024
ad0ac67
change OPT_MCU_RAXXX, fix missing prototype warnings.
hathach Dec 13, 2024
380bfc0
fix portenta build, added core-m85.cmake/mk
hathach Dec 13, 2024
8eeddaa
Merge pull request #2897 from shdeb/hid_pid_defs
hathach Dec 13, 2024
656772f
make sure g_bsp_rom_registers is not dropped by linker in cmake build.
hathach Dec 16, 2024
7e207e4
fix warning due to bsp_rom_registers.c
hathach Dec 16, 2024
73ec14d
install libc++ for clang build fuzzer
hathach Dec 16, 2024
f74ee9c
change rx url
hathach Dec 17, 2024
b1eae1e
Merge pull request #2906 from hathach/add-ra8m1
hathach Dec 17, 2024
a39e30d
Merge branch 'refs/heads/master' into fork/HiFiPhile/rt1170
hathach Dec 17, 2024
22a6777
enable CFG_TUD/THU_MEM_DCACHE_ENABLE for imxrt with M7 by default
hathach Dec 17, 2024
7c1afa8
Merge pull request #2865 from HiFiPhile/rt1170
hathach Dec 18, 2024
ab9472f
update doc, bump up release 0.18.0
hathach Dec 25, 2024
86ad6e5
Merge pull request #2913 from hathach/release-0.18.0
hathach Dec 25, 2024
6a36c74
embed metadata to family.c and board.h to generate supported boards doc
hathach Dec 27, 2024
824793a
move mcu supported to README.rst, separated supported boards to board…
hathach Dec 27, 2024
29f226c
docs index.rst pointed to README.rst
hathach Dec 27, 2024
de38e53
update docs, remove uses.rst, structure.rst. Refactor docs, use READM…
hathach Dec 27, 2024
2495563
Merge pull request #2917 from hathach/board-doc
hathach Dec 27, 2024
679065c
fix(ncm): Use IN buffer for transmit checks
tore-espressif Jan 14, 2025
e889c0b
Fix ceedling (#2949)
hathach Jan 15, 2025
76fe039
src/class/hid/hid_host.c: fix logging calls for epbuf
dhalbert Jan 14, 2025
880aae4
Merge pull request #2947 from espressif/fix/ncm_buffer_checks
HiFiPhile Jan 15, 2025
6476ff1
fix(ncm): Return invalid NTBs to free list
tore-espressif Jan 15, 2025
2109b80
update esp-idf to 5.3.2
hathach Jan 16, 2025
5b32df5
add s3 undefined speed note for racing issue with reset.
hathach Jan 20, 2025
786aa2c
use IAR toke for hfp runner since normal IAR license is expired
hathach Jan 20, 2025
2d7d107
Merge pull request #2955 from hathach/fix-dwc2-issue
hathach Jan 20, 2025
feb41ee
Merge pull request #2950 from espressif/fix/ncm_buffer_validation
HiFiPhile Jan 22, 2025
11935d2
Merge branch 'master' into sync/upstream
roma-jam Jan 22, 2025
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12 changes: 8 additions & 4 deletions .gitignore
Original file line number Diff line number Diff line change
@@ -1,16 +1,20 @@
html
latex
*.a
*.d
*.o
*.P
*.map
*.axf
*.bin
*.jlink
*.emSession
*.elf
*.env
*.ind
.env
*.log
*.map
*.obj
*.jlink
*.emSession
*.ninja*
.settings/
.vscode/
.gdb_history
2 changes: 1 addition & 1 deletion examples/device/audio_test_multi_rate/src/main.c
Original file line number Diff line number Diff line change
@@ -85,7 +85,7 @@ audio_control_range_2_n_t(1) volumeRng[CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_TX+1];


// Audio test data
CFG_TUSB_MEM_ALIGN uint8_t test_buffer_audio[CFG_TUD_AUDIO_FUNC_1_EP_IN_SZ_MAX];
CFG_TUD_MEM_ALIGN uint8_t test_buffer_audio[CFG_TUD_AUDIO_FUNC_1_EP_IN_SZ_MAX];
uint16_t startVal = 0;

void led_blinking_task(void);
1 change: 1 addition & 0 deletions hw/bsp/broadcom_32bit/family.cmake
Original file line number Diff line number Diff line change
@@ -106,5 +106,6 @@ function(family_configure_example TARGET RTOS)
target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb)

# Flashing
family_add_bin_hex(${TARGET})
family_flash_jlink(${TARGET})
endfunction()
1 change: 1 addition & 0 deletions hw/bsp/broadcom_64bit/family.cmake
Original file line number Diff line number Diff line change
@@ -113,5 +113,6 @@ function(family_configure_example TARGET RTOS)
target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb)

# Flashing
family_add_bin_hex(${TARGET})
family_flash_jlink(${TARGET})
endfunction()
1 change: 1 addition & 0 deletions hw/bsp/f1c100s/family.cmake
Original file line number Diff line number Diff line change
@@ -110,5 +110,6 @@ function(family_configure_example TARGET RTOS)
target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb)

# Flashing
family_add_bin_hex(${TARGET})
family_flash_jlink(${TARGET})
endfunction()
15 changes: 11 additions & 4 deletions hw/bsp/family_support.cmake
Original file line number Diff line number Diff line change
@@ -300,10 +300,17 @@ endfunction()

# Add bin/hex output
function(family_add_bin_hex TARGET)
add_custom_command(TARGET ${TARGET} POST_BUILD
COMMAND ${CMAKE_OBJCOPY} -Obinary $<TARGET_FILE:${TARGET}> $<TARGET_FILE_DIR:${TARGET}>/${TARGET}.bin
COMMAND ${CMAKE_OBJCOPY} -Oihex $<TARGET_FILE:${TARGET}> $<TARGET_FILE_DIR:${TARGET}>/${TARGET}.hex
VERBATIM)
if (CMAKE_C_COMPILER_ID STREQUAL "IAR")
add_custom_command(TARGET ${TARGET} POST_BUILD
COMMAND ${CMAKE_OBJCOPY} --bin $<TARGET_FILE:${TARGET}> $<TARGET_FILE_DIR:${TARGET}>/${TARGET}.bin
COMMAND ${CMAKE_OBJCOPY} --ihex $<TARGET_FILE:${TARGET}> $<TARGET_FILE_DIR:${TARGET}>/${TARGET}.hex
VERBATIM)
else()
add_custom_command(TARGET ${TARGET} POST_BUILD
COMMAND ${CMAKE_OBJCOPY} -Obinary $<TARGET_FILE:${TARGET}> $<TARGET_FILE_DIR:${TARGET}>/${TARGET}.bin
COMMAND ${CMAKE_OBJCOPY} -Oihex $<TARGET_FILE:${TARGET}> $<TARGET_FILE_DIR:${TARGET}>/${TARGET}.hex
VERBATIM)
endif()
endfunction()

# Add uf2 output
1 change: 1 addition & 0 deletions hw/bsp/gd32vf103/family.cmake
Original file line number Diff line number Diff line change
@@ -117,5 +117,6 @@ function(family_configure_example TARGET RTOS)
target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb)

# Flashing
family_add_bin_hex(${TARGET})
family_flash_jlink(${TARGET})
endfunction()
17 changes: 13 additions & 4 deletions hw/bsp/imxrt/boards/mimxrt1170_evkb/board.cmake
Original file line number Diff line number Diff line change
@@ -1,16 +1,25 @@
set(MCU_VARIANT MIMXRT1176)
set(MCU_CORE _cm7)

set(JLINK_DEVICE MIMXRT1176xxxA_M7)
set(PYOCD_TARGET mimxrt1170_cm7)
if (M4 STREQUAL "1")
set(MCU_CORE _cm4)
set(JLINK_CORE _M4)
set(LD_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_VARIANT}xxxxx${MCU_CORE}_ram.ld)
set(CMAKE_SYSTEM_PROCESSOR cortex-m4 CACHE INTERNAL "System Processor")
else ()
set(MCU_CORE _cm7)
set(JLINK_CORE _M7)
endif()

set(JLINK_DEVICE MIMXRT1176xxxA${JLINK_CORE})
set(PYOCD_TARGET mimxrt1170${MCU_CORE})
set(NXPLINK_DEVICE MIMXRT1176xxxxx:MIMXRT1170-EVK)

function(update_board TARGET)
target_sources(${TARGET} PUBLIC
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/evkbmimxrt1170_flexspi_nor_config.c
)
target_compile_definitions(${TARGET} PUBLIC
CPU_MIMXRT1176DVMAA_cm7
CPU_MIMXRT1176DVMAA${MCU_CORE}
BOARD_TUD_RHPORT=0
BOARD_TUH_RHPORT=1
)
18 changes: 14 additions & 4 deletions hw/bsp/imxrt/boards/mimxrt1170_evkb/board.mk
Original file line number Diff line number Diff line change
@@ -1,12 +1,22 @@
CFLAGS += -DCPU_MIMXRT1176DVMAA_cm7
MCU_VARIANT = MIMXRT1176
MCU_CORE = _cm7

ifeq ($(M4), 1)
MCU_CORE = _cm4
JLINK_CORE = _M4
CPU_CORE = cortex-m4
LD_FILE ?= $(MCU_DIR)/gcc/$(MCU_VARIANT)xxxxx${MCU_CORE}_ram.ld
else
MCU_CORE = _cm7
JLINK_CORE = _M7
endif

CFLAGS += -DCPU_MIMXRT1176DVMAA$(MCU_CORE)

# For flash-jlink target
JLINK_DEVICE = MIMXRT1176xxxA_M7
JLINK_DEVICE = MIMXRT1176xxxA$(JLINK_CORE)

# For flash-pyocd target
PYOCD_TARGET = mimxrt1170_cm7
PYOCD_TARGET = mimxrt1170$(MCU_CORE)

BOARD_TUD_RHPORT = 0
BOARD_TUH_RHPORT = 1
14 changes: 10 additions & 4 deletions hw/bsp/imxrt/boards/mimxrt1170_evkb/board/clock_config.c
Original file line number Diff line number Diff line change
@@ -11,11 +11,11 @@

/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
!!GlobalInfo
product: Clocks v12.0
product: Clocks v14.0
processor: MIMXRT1176xxxxx
package_id: MIMXRT1176DVMAA
mcu_data: ksdk2_0
processor_version: 14.0.1
processor_version: 16.3.0
board: MIMXRT1170-EVKB
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/

@@ -335,7 +335,6 @@ void BOARD_BootClockRUN(void)

/* Init OSC RC 400M */
CLOCK_OSC_EnableOscRc400M();
CLOCK_OSC_GateOscRc400M(false);

/* Init OSC RC 48M */
CLOCK_OSC_EnableOsc48M(true);
@@ -349,22 +348,29 @@ void BOARD_BootClockRUN(void)
{
}

/* Switch both core, M7 Systick and Bus_Lpsr to OscRC48MDiv2 first */
/* Switch core M7 clock root to OscRC48MDiv2 first */
#if __CORTEX_M == 7
rootCfg.mux = kCLOCK_M7_ClockRoot_MuxOscRc48MDiv2;
rootCfg.div = 1;
CLOCK_SetRootClock(kCLOCK_Root_M7, &rootCfg);
#endif

/* Switch core M7 systick clock root to OscRC48MDiv2 first */
#if __CORTEX_M == 7
rootCfg.mux = kCLOCK_M7_SYSTICK_ClockRoot_MuxOscRc48MDiv2;
rootCfg.div = 1;
CLOCK_SetRootClock(kCLOCK_Root_M7_Systick, &rootCfg);
#endif

/* Switch core M4 clock root to OscRC48MDiv2 first */
#if __CORTEX_M == 4
rootCfg.mux = kCLOCK_M4_ClockRoot_MuxOscRc48MDiv2;
rootCfg.div = 1;
CLOCK_SetRootClock(kCLOCK_Root_M4, &rootCfg);
#endif

/* Switch the Bus_Lpsr clock root to OscRC48MDiv2 first */
#if __CORTEX_M == 4
rootCfg.mux = kCLOCK_BUS_LPSR_ClockRoot_MuxOscRc48MDiv2;
rootCfg.div = 1;
CLOCK_SetRootClock(kCLOCK_Root_Bus_Lpsr, &rootCfg);
2 changes: 1 addition & 1 deletion hw/bsp/imxrt/boards/mimxrt1170_evkb/board/clock_config.h
Original file line number Diff line number Diff line change
@@ -48,7 +48,7 @@ void BOARD_InitBootClocks(void);
#define BOARD_BOOTCLOCKRUN_ARM_PLL_CLK 996000000UL /* Clock consumers of ARM_PLL_CLK output : N/A */
#define BOARD_BOOTCLOCKRUN_ASRC_CLK_ROOT 24000000UL /* Clock consumers of ASRC_CLK_ROOT output : ASRC */
#define BOARD_BOOTCLOCKRUN_AXI_CLK_ROOT 996000000UL /* Clock consumers of AXI_CLK_ROOT output : FLEXRAM */
#define BOARD_BOOTCLOCKRUN_BUS_CLK_ROOT 240000000UL /* Clock consumers of BUS_CLK_ROOT output : ADC_ETC, AOI1, AOI2, CAAM, CAN1, CAN2, CM7_GPIO2, CM7_GPIO3, CMP1, CMP2, CMP3, CMP4, CSI, DAC, DMA0, DMAMUX0, DSI_HOST, EMVSIM1, EMVSIM2, ENC1, ENC2, ENC3, ENC4, ENET, ENET_1G, ENET_QOS, EWM, FLEXIO1, FLEXIO2, FLEXSPI1, FLEXSPI2, GPIO1, GPIO2, GPIO3, GPIO4, GPIO5, GPIO6, IEE_APC, IOMUXC, IOMUXC_GPR, KPP, LCDIF, LCDIFV2, LPADC1, LPADC2, LPI2C1, LPI2C2, LPI2C3, LPI2C4, LPSPI1, LPSPI2, LPSPI3, LPSPI4, LPUART1, LPUART10, LPUART2, LPUART3, LPUART4, LPUART5, LPUART6, LPUART7, LPUART8, LPUART9, MECC1, MECC2, MIPI_CSI2RX, PIT1, PWM1, PWM2, PWM3, PWM4, PXP, RTWDOG3, SAI1, SAI2, SAI3, SPDIF, TMR1, TMR2, TMR3, TMR4, USBPHY1, USBPHY2, USB_OTG1, USB_OTG2, USDHC1, USDHC2, WDOG1, WDOG2, XBARA1, XBARB2, XBARB3, XECC_FLEXSPI1, XECC_FLEXSPI2, XECC_SEMC, XRDC2_D0, XRDC2_D1 */
#define BOARD_BOOTCLOCKRUN_BUS_CLK_ROOT 240000000UL /* Clock consumers of BUS_CLK_ROOT output : ADC_ETC, AOI1, AOI2, CAAM, CAN1, CAN2, CM7_GPIO2, CM7_GPIO3, CMP1, CMP2, CMP3, CMP4, CSI, DAC, DMA0, DMAMUX0, DSI_HOST, EMVSIM1, EMVSIM2, ENC1, ENC2, ENC3, ENC4, ENET, ENET_1G, ENET_QOS, EWM, FLEXIO1, FLEXIO2, FLEXSPI1, FLEXSPI2, GPIO1, GPIO2, GPIO3, GPIO4, GPIO5, GPIO6, IEE_APC, IEE__IEE_RT1170, IOMUXC, IOMUXC_GPR, KPP, LCDIF, LCDIFV2, LPADC1, LPADC2, LPI2C1, LPI2C2, LPI2C3, LPI2C4, LPSPI1, LPSPI2, LPSPI3, LPSPI4, LPUART1, LPUART10, LPUART2, LPUART3, LPUART4, LPUART5, LPUART6, LPUART7, LPUART8, LPUART9, MECC1, MECC2, MIPI_CSI2RX, PIT1, PWM1, PWM2, PWM3, PWM4, PXP, RTWDOG3, SAI1, SAI2, SAI3, SPDIF, TMR1, TMR2, TMR3, TMR4, USBPHY1, USBPHY2, USB_OTG1, USB_OTG2, USDHC1, USDHC2, WDOG1, WDOG2, XBARA1, XBARB2, XBARB3, XECC_FLEXSPI1, XECC_FLEXSPI2, XECC_SEMC, XRDC2_D0, XRDC2_D1 */
#define BOARD_BOOTCLOCKRUN_BUS_LPSR_CLK_ROOT 160000000UL /* Clock consumers of BUS_LPSR_CLK_ROOT output : CAN3, GPIO10, GPIO11, GPIO12, GPIO7, GPIO8, GPIO9, IOMUXC_LPSR, LPI2C5, LPI2C6, LPSPI5, LPSPI6, LPUART11, LPUART12, MUA, MUB, PDM, PIT2, RDC, RTWDOG4, SAI4, SNVS, XRDC2_D0, XRDC2_D1 */
#define BOARD_BOOTCLOCKRUN_CAN1_CLK_ROOT 24000000UL /* Clock consumers of CAN1_CLK_ROOT output : CAN1 */
#define BOARD_BOOTCLOCKRUN_CAN2_CLK_ROOT 24000000UL /* Clock consumers of CAN2_CLK_ROOT output : CAN2 */
15 changes: 6 additions & 9 deletions hw/bsp/imxrt/boards/mimxrt1170_evkb/board/pin_mux.c
Original file line number Diff line number Diff line change
@@ -6,11 +6,11 @@
/*
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
!!GlobalInfo
product: Pins v14.0
product: Pins v16.0
processor: MIMXRT1176xxxxx
package_id: MIMXRT1176DVMAA
mcu_data: ksdk2_0
processor_version: 14.0.1
processor_version: 16.3.0
board: MIMXRT1170-EVKB
external_user_signals: {}
pin_labels:
@@ -90,7 +90,7 @@ void BOARD_InitPins(void) {
IOMUXC_GPIO_AD_04_GPIO9_IO03, /* GPIO_AD_04 PAD functional properties : */
0x02U); /* Slew Rate Field: Slow Slew Rate
Drive Strength Field: high drive strength
Pull / Keep Select Field: Pull Disable, Highz
Pull / Keep Select Field: Pull Disable
Pull Up / Down Config. Field: Weak pull down
Open Drain Field: Disabled
Domain write protection: Both cores are allowed
@@ -99,7 +99,7 @@ void BOARD_InitPins(void) {
IOMUXC_GPIO_AD_24_LPUART1_TXD, /* GPIO_AD_24 PAD functional properties : */
0x02U); /* Slew Rate Field: Slow Slew Rate
Drive Strength Field: high drive strength
Pull / Keep Select Field: Pull Disable, Highz
Pull / Keep Select Field: Pull Disable
Pull Up / Down Config. Field: Weak pull down
Open Drain Field: Disabled
Domain write protection: Both cores are allowed
@@ -108,22 +108,19 @@ void BOARD_InitPins(void) {
IOMUXC_GPIO_AD_25_LPUART1_RXD, /* GPIO_AD_25 PAD functional properties : */
0x02U); /* Slew Rate Field: Slow Slew Rate
Drive Strength Field: high drive strength
Pull / Keep Select Field: Pull Disable, Highz
Pull / Keep Select Field: Pull Disable
Pull Up / Down Config. Field: Weak pull down
Open Drain Field: Disabled
Domain write protection: Both cores are allowed
Domain write protection lock: Neither of DWP bits is locked */
IOMUXC_SetPinConfig(
IOMUXC_WAKEUP_DIG_GPIO13_IO00, /* WAKEUP_DIG PAD functional properties : */
0x0EU); /* Slew Rate Field: Slow Slew Rate
Drive Strength Field: high driver
Pull / Keep Select Field: Pull Enable
0x0EU); /* Pull / Keep Select Field: Pull Enable
Pull Up / Down Config. Field: Weak pull up
Open Drain SNVS Field: Disabled
Domain write protection: Both cores are allowed
Domain write protection lock: Neither of DWP bits is locked */
}

/***********************************************************************************************************************
* EOF
**********************************************************************************************************************/
2 changes: 1 addition & 1 deletion hw/bsp/imxrt/boards/mimxrt1170_evkb/board/pin_mux.h
Original file line number Diff line number Diff line change
@@ -46,7 +46,7 @@ void BOARD_InitBootPins(void);
#define BOARD_INITPINS_USER_LED_GPIO_PIN 3U /*!< GPIO pin number */
#define BOARD_INITPINS_USER_LED_GPIO_PIN_MASK (1U << 3U) /*!< GPIO pin mask */

/* WAKEUP (coord T8), USER_BUTTON */
/* WAKEUP (coord T8), USER_BUTTON/SW7 */
/* Routed pin properties */
#define BOARD_INITPINS_USER_BUTTON_PERIPHERAL GPIO13 /*!< Peripheral name */
#define BOARD_INITPINS_USER_BUTTON_SIGNAL gpio_io /*!< Signal name */
13 changes: 6 additions & 7 deletions hw/bsp/imxrt/boards/mimxrt1170_evkb/mimxrt1170_evkb.mex
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
<?xml version="1.0" encoding= "UTF-8" ?>
<configuration name="MIMXRT1176xxxxx" xsi:schemaLocation="http://mcuxpresso.nxp.com/XSD/mex_configuration_14 http://mcuxpresso.nxp.com/XSD/mex_configuration_14.xsd" uuid="060646c1-2247-47a8-b52d-03c1968b4426" version="14" xmlns="http://mcuxpresso.nxp.com/XSD/mex_configuration_14" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
<configuration name="MIMXRT1176xxxxx" xsi:schemaLocation="http://mcuxpresso.nxp.com/XSD/mex_configuration_16 http://mcuxpresso.nxp.com/XSD/mex_configuration_16.xsd" uuid="060646c1-2247-47a8-b52d-03c1968b4426" version="16" xmlns="http://mcuxpresso.nxp.com/XSD/mex_configuration_16" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
<common>
<processor>MIMXRT1176xxxxx</processor>
<package>MIMXRT1176DVMAA</package>
@@ -19,18 +19,17 @@
<generate_registers_defines>false</generate_registers_defines>
</preferences>
<tools>
<pins name="Pins" version="14.0" enabled="true" update_project_code="true">
<pins name="Pins" version="16.0" enabled="true" update_project_code="true">
<generated_project_files>
<file path="board/pin_mux.c" update_enabled="true"/>
<file path="board/pin_mux.h" update_enabled="true"/>
</generated_project_files>
<pins_profile>
<processor_version>14.0.1</processor_version>
<processor_version>16.3.0</processor_version>
<pin_labels>
<pin_label pin_num="M13" pin_signal="GPIO_AD_04" label="SIM1_PD/J44[C8]/USER_LED_CTL1/J9[8]/J25[7]" identifier="SIM1_PD;LED;USER_LED"/>
</pin_labels>
<external_user_signals>
<routingDetailsColumns/>
<properties/>
</external_user_signals>
<power_domains/>
@@ -44,7 +43,7 @@
<enableClock>true</enableClock>
</options>
<dependencies>
<dependency resourceType="Peripheral" resourceId="LPUART1" description="Peripheral LPUART1 is not initialized" problem_level="1" source="Pins:BOARD_InitPins">
<dependency resourceType="Peripheral" resourceId="LPUART1" description="Peripheral LPUART1 signals are routed in the Pins Tool, but the peripheral is not initialized in the Peripherals Tool." problem_level="1" source="Pins:BOARD_InitPins">
<feature name="initialized" evaluation="equal">
<data>true</data>
</feature>
@@ -104,13 +103,13 @@
</function>
</functions_list>
</pins>
<clocks name="Clocks" version="12.0" enabled="true" update_project_code="true">
<clocks name="Clocks" version="14.0" enabled="true" update_project_code="true">
<generated_project_files>
<file path="board/clock_config.c" update_enabled="true"/>
<file path="board/clock_config.h" update_enabled="true"/>
</generated_project_files>
<clocks_profile>
<processor_version>14.0.1</processor_version>
<processor_version>16.3.0</processor_version>
</clocks_profile>
<clock_configurations>
<clock_configuration name="BOARD_BootClockRUN" id_prefix="" prefix_user_defined="false">
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