fix tests

esp-rs · Feb 14, 2025 · a6fcdd3 · a6fcdd3
1 parent c891679
commit a6fcdd3
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Showing 5 changed files with 22 additions and 22 deletions.
diff --git a/examples/src/bin/ieee802154_sniffer.rs b/examples/src/bin/ieee802154_sniffer.rs
@@ -40,7 +40,7 @@ fn main() -> ! {
     let mut read = [0u8; 2];
     loop {
         let mut buf = [0u8; 1];
-        _ = uart0.read_bytes(&mut buf);
+        _ = uart0.read(&mut buf);
 
         if buf[0] == b'r' {
             continue;

diff --git a/hil-test/tests/spi_full_duplex.rs b/hil-test/tests/spi_full_duplex.rs
@@ -198,7 +198,7 @@ mod tests {
 
         SpiBus::write(&mut ctx.spi, &write[..]).expect("Asymmetric write failed");
         // Flush because we're not reading, so the write may happen in the background
-        ctx.spi.flush().expect("Flush failed");
+        ctx.spi.flush().unwrap().expect("Flush failed");
 
         assert_eq!(unit.value(), 9);
     }
@@ -260,7 +260,7 @@ mod tests {
 
         SpiBus::transfer(&mut ctx.spi, &mut [], &write[..]).expect("Asymmetric transfer failed");
         // Flush because we're not reading, so the write may happen in the background
-        ctx.spi.flush().expect("Flush failed");
+        ctx.spi.flush().unwrap().expect("Flush failed");
 
         assert_eq!(unit.value(), 9);
     }

diff --git a/hil-test/tests/uart.rs b/hil-test/tests/uart.rs
@@ -37,9 +37,9 @@ mod tests {
 
     #[test]
     fn test_send_receive(mut ctx: Context) {
-        ctx.uart.write_bytes(&[0x42]).unwrap();
+        ctx.uart.write(&[0x42]).unwrap();
         let mut byte = [0u8; 1];
-        ctx.uart.read_bytes(&mut byte).unwrap();
+        ctx.uart.read(&mut byte).unwrap();
         assert_eq!(byte[0], 0x42);
     }
 
@@ -53,9 +53,9 @@ mod tests {
             )
             .unwrap();
 
-        ctx.uart.write_bytes(&[0x42]).unwrap();
+        ctx.uart.write(&[0x42]).unwrap();
         let mut byte = [0u8; 1];
-        ctx.uart.read_bytes(&mut byte).unwrap();
+        ctx.uart.read(&mut byte).unwrap();
         assert_eq!(byte[0], 0x42);
 
         ctx.uart
@@ -66,9 +66,9 @@ mod tests {
             )
             .unwrap();
 
-        ctx.uart.write_bytes(&[0x42]).unwrap();
+        ctx.uart.write(&[0x42]).unwrap();
         let mut byte = [0u8; 1];
-        ctx.uart.read_bytes(&mut byte).unwrap();
+        ctx.uart.read(&mut byte).unwrap();
         assert_eq!(byte[0], 0x42);
     }
 
@@ -77,12 +77,12 @@ mod tests {
         const BUF_SIZE: usize = 128; // UART_FIFO_SIZE
 
         let data = [13; BUF_SIZE];
-        let written = ctx.uart.write_bytes(&data).unwrap();
+        let written = ctx.uart.write(&data).unwrap();
         assert_eq!(written, BUF_SIZE);
 
         let mut buffer = [0; BUF_SIZE];
 
-        ctx.uart.read_bytes(&mut buffer).unwrap();
+        ctx.uart.read(&mut buffer).unwrap();
 
         assert_eq!(data, buffer);
     }
@@ -115,9 +115,9 @@ mod tests {
                         .with_clock_source(clock_source),
                 )
                 .unwrap();
-            ctx.uart.write_bytes(&[byte_to_write]).unwrap();
+            ctx.uart.write(&[byte_to_write]).unwrap();
             let mut byte = [0u8; 1];
-            ctx.uart.read_bytes(&mut byte).unwrap();
+            ctx.uart.read(&mut byte).unwrap();
 
             assert_eq!(byte[0], byte_to_write);
             byte_to_write = !byte_to_write;

diff --git a/hil-test/tests/uart_regression.rs b/hil-test/tests/uart_regression.rs
@@ -36,10 +36,10 @@ mod tests {
             .unwrap()
             .with_tx(tx);
 
-        tx.flush();
-        tx.write_bytes(&[0x42]).unwrap();
+        tx.flush().unwrap();
+        tx.write(&[0x42]).unwrap();
         let mut byte = [0u8; 1];
-        rx.read_bytes(&mut byte).unwrap();
+        rx.read(&mut byte).unwrap();
 
         assert_eq!(byte[0], 0x42);
     }

diff --git a/hil-test/tests/uart_tx_rx.rs b/hil-test/tests/uart_tx_rx.rs
@@ -42,10 +42,10 @@ mod tests {
     fn test_send_receive(mut ctx: Context) {
         let byte = [0x42];
 
-        ctx.tx.flush();
-        ctx.tx.write_bytes(&byte).unwrap();
+        ctx.tx.flush().unwrap();
+        ctx.tx.write(&byte).unwrap();
         let mut buf = [0u8; 1];
-        ctx.rx.read_bytes(&mut buf).unwrap();
+        ctx.rx.read(&mut buf).unwrap();
 
         assert_eq!(buf[0], 0x42);
     }
@@ -55,10 +55,10 @@ mod tests {
         let bytes = [0x42, 0x43, 0x44];
         let mut buf = [0u8; 3];
 
-        ctx.tx.flush();
-        ctx.tx.write_bytes(&bytes).unwrap();
+        ctx.tx.flush().unwrap();
+        ctx.tx.write(&bytes).unwrap();
 
-        ctx.rx.read_bytes(&mut buf).unwrap();
+        ctx.rx.read(&mut buf).unwrap();
 
         assert_eq!(buf, bytes);
     }