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Fix code block in server.rst.
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junkmd committed Dec 26, 2024
1 parent 0b5c246 commit d9accfa
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2 changes: 1 addition & 1 deletion docs/source/server.rst
Original file line number Diff line number Diff line change
Expand Up @@ -87,8 +87,8 @@ are not in the type library.
# generate wrapper code for the type library, this needs
# to be done only once (but also each time the IDL file changes)
GetModule('path\\to\\mytypelib.tlb')

from comtypes.gen.MyTypeLib import MyObject

class MyObjectImpl(MyObject):
# registry entries
_reg_threading_ = "Both"
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