[hw,ac_range_check,rtl] Change overwrite to 8-bit Mubi for better FI …

…protection Signed-off-by: Robert Schilling <[email protected]>
engdoreis · Dec 16, 2024 · c1103e5 · c1103e5
1 parent 068d1c6
commit c1103e5
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Showing 3 changed files with 3 additions and 3 deletions.
diff --git a/hw/ip_templates/ac_range_check/README.md b/hw/ip_templates/ac_range_check/README.md
@@ -116,7 +116,7 @@ When the lock is active, the base, mask/limit, and permission settings of the ra
 ## Bypass Mode
 
 The system shall support a bypass mode controlled via a bypass_wire signal.
-The bypass_signal shall be driven by a 4-bit encoded multi-bit encoded signal in the ROT-controlled register space.
+The bypass_signal shall be driven by a 8-bit encoded multi-bit encoded signal in the ROT-controlled register space.
 A single bypass_signal shall manage access override for all source AC range registers within the system.
 
 When the bypass_wire is asserted, the range register logic shall allow access for all transactions, overriding any existing configuration settings.

diff --git a/hw/ip_templates/ac_range_check/data/ac_range_check.hjson.tpl b/hw/ip_templates/ac_range_check/data/ac_range_check.hjson.tpl
@@ -30,7 +30,7 @@
       type:    "uni",
       act:     "req",
       package: "prim_mubi_pkg",
-      struct:  "mubi4",
+      struct:  "mubi8",
       width:   "1"
       desc:    "Overwrites all ranges and let all requests pass through."
     },

diff --git a/hw/ip_templates/ac_range_check/rtl/ac_range_check.sv.tpl b/hw/ip_templates/ac_range_check/rtl/ac_range_check.sv.tpl
@@ -16,7 +16,7 @@ module ${module_instance_name}
   // Access range check interrupts
   output logic                                      intr_deny_cnt_reached_o,
   // Inter module signals
-  input prim_mubi_pkg::mubi4_t                      range_check_overwrite_i,
+  input prim_mubi_pkg::mubi8_t                      range_check_overwrite_i,
   // Incoming TLUL interface
   input  tlul_pkg::tl_h2d_t                         ctn_tl_h2d_i,
   output tlul_pkg::tl_d2h_t                         ctn_tl_d2h_o,