try VNAND

emmansun · Sep 11, 2024 · 2ca0421 · 2ca0421
1 parent 4f60a23
commit 2ca0421
Showing 1 changed file with 1 addition and 1 deletion.
diff --git a/sm4/asm_ppc64x.s b/sm4/asm_ppc64x.s
@@ -101,7 +101,7 @@ GLOBL ·rcon(SB), RODATA, $192
 // -  y: 128 bits temp register
 // -  z: 128 bits temp register
 #define AFFINE_TRANSFORM_N(L, H, V_FOUR, x, y, z)  \
-	VNAND NIBBLE_MASK, x, z;             \
+	VNAND x, NIBBLE_MASK, z;             \
 	VPERM L, L, z, y;                    \
 	VSRW x, V_FOUR, x;                   \
 	VAND NIBBLE_MASK, x, z;              \