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load fp register parameter #20828

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Feb 6, 2025
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25 changes: 21 additions & 4 deletions compiler/src/dmd/backend/arm/instr.d
Original file line number Diff line number Diff line change
Expand Up @@ -868,9 +868,19 @@
Rt;
}

/* Load/store register pair (unprivileged)
* Load/store register pair (immediate pre-indexed)
* Atomic memory operation
/* STR <Vt>,[<Xn|SP>],#<simm> Post-index https://www.scs.stanford.edu/~zyedidia/arm64/str_imm_fpsimd.html
*/

/* Load/store register (unprivileged)
*/

/* Load/store register (immediate pre-indexed)
*/

/* STR <Vt>,[<Xn|SP>,#<simm>]! Pre-index https://www.scs.stanford.edu/~zyedidia/arm64/str_imm_fpsimd.html
*/

/* Atomic memory operation
*/

/* Load/store register (register offset)
Expand All @@ -897,8 +907,10 @@
/* Load/store register (unsigned immediate)
* https://www.scs.stanford.edu/~zyedidia/arm64/encodingindex.html#ldst_pos
*/
static uint ldst_pos(uint size, uint VR, uint opc, uint imm12, ubyte Rn, ubyte Rt)
static uint ldst_pos(uint size, uint VR, uint opc, uint imm12, reg_t Rn, reg_t Vt)
{
assert(Vt > 31);
reg_t Rt = Vt & 31;

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return (size << 30) |
(7 << 27) |
(VR << 26) |
Expand All @@ -909,6 +921,11 @@
Rt;
}

/* https://www.scs.stanford.edu/~zyedidia/arm64/str_imm_fpsimd.html
* STR <Vt>,[<Xn|SP>,#<simm>] Unsigned offset
*/
static uint str_imm_fpsimd(uint size, uint opc, uint imm12, reg_t Rn, reg_t Vt) { return ldst_pos(size,1,opc,imm12,Rn,Vt); }

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/* } */

/* { ************************** Data Processing -- Register **********************************/
Expand Down
2 changes: 1 addition & 1 deletion compiler/src/dmd/backend/codebuilder.d
Original file line number Diff line number Diff line change
Expand Up @@ -35,7 +35,7 @@ struct CodeBuilder
code** pTail;

enum BADINS = 0x1234_5678;
// enum BADINS = 0xF940_03A8;
// enum BADINS = 0xF900_0FA0;

nothrow:
public:
Expand Down
14 changes: 10 additions & 4 deletions compiler/src/dmd/backend/x86/cod3.d
Original file line number Diff line number Diff line change
Expand Up @@ -1142,7 +1142,7 @@
case BC.retexp:
reg_t reg1, reg2;
retregs = allocretregs(cgstate, e.Ety, e.ET, funcsym_p.ty(), reg1, reg2);
//printf("reg1: %d, reg2: %d\n", reg1, reg2);
//printf("reg1: %d, reg2: %d\n", reg1, reg2);
//printf("allocretregs returns %llx %s\n", retregs, regm_str(retregs));

reg_t lreg = NOREG;
Expand Down Expand Up @@ -4196,6 +4196,8 @@
}

/************************************
* Take the parameters passed in registers, and put them into the function's local
* symbol table.
* Params:
* cdb = generated code sink
* tf = what's the type of the function
Expand Down Expand Up @@ -4297,8 +4299,12 @@
{
if (AArch64)
{
// STR preg,bp,#offset
cdb.gen1(INSTR.str_imm_gen(sz > 4, preg, 29, offset + localsize + 16));
if (tyfloating(t.Tty))

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// STR preg,[bp,#offset]
cdb.gen1(INSTR.str_imm_fpsimd(2 + (sz == 8),0,cast(uint)(offset + localsize + 16) >> 3,29,preg));

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else
// STR preg,bp,#offset
cdb.gen1(INSTR.str_imm_gen(sz > 4, preg, 29, offset + localsize + 16));

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}
else
{
Expand Down Expand Up @@ -4448,7 +4454,7 @@
}
}

/* For parameters that were passed on the stack, but are enregistered,
/* For parameters that were passed on the stack, but are enregistered by the function,
* initialize the registers with the parameter stack values.
* Do not use assignaddr(), as it will replace the stack reference with
* the register.
Expand Down
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