Add linting with verible (#3)

.github/workflows/reuse.yaml

@@ -4,7 +4,11 @@
 
 name: REUSE Compliance Check
 
-on: pull_request
+on:
+  push:
+    branches:
+      - main
+  pull_request:
 
 jobs:
   test:

.github/workflows/verible-format.yaml

@@ -4,7 +4,11 @@
 
 name: Verible formatter check
 
-on: pull_request
+on:
+  push:
+    branches:
+      - main
+  pull_request:
 
 jobs:
   verible-format:

.github/workflows/verible-lint.yaml

@@ -0,0 +1,26 @@
+# SPDX-FileCopyrightText: 2024 David Mallasén Quintana
+# SPDX-License-Identifier: LGPL-3.0-or-later
+# Source: https://github.com/davidmallasen/arithmetic_units
+
+name: Verible linter check
+
+on:
+  push:
+    branches:
+      - main
+  pull_request:
+
+jobs:
+  verible-lint:
+    runs-on: ubuntu-latest
+    permissions:
+      checks: write
+      contents: read
+      pull-requests: write
+    steps:
+    - uses: actions/checkout@v4
+    - uses: chipsalliance/verible-linter-action@0309299fa6ecd3db11135e9987d6de71de437616
+      with:
+        verible_version: "v0.0-3752-g8b64887e"
+        fail_on_error: true
+        github_token: ${{ secrets.GITHUB_TOKEN }}

Makefile

@@ -6,3 +6,8 @@
 .PHONY: verible-format
 verible-format:
 	find -name '*.sv*' | xargs python util/verible-format.py --inplace --files 2> /dev/zero
+
+# Run verible linting of hw files
+.PHONY: verible-lint
+verible-lint:
+	find -name '*.sv*' | xargs verible-verilog-lint

README.md

@@ -101,6 +101,12 @@ run:
 make verible-format
 ~~~
 
+To run the Verible linter run:
+
+~~~bash
+make verible-lint
+~~~
+
 ## Bibliography
 [1] J.-M. Muller et al., Handbook of Floating-Point Arithmetic. Cham: Springer International Publishing, 2018. doi: 10.1007/978-3-319-76526-6.
 

hw/common/barrel_shifter.sv

@@ -12,16 +12,16 @@
 // Delay: O(log N)
 
 module barrel_shifter #(
-  parameter N = 32,  // Width of the data (N > 0)
+  parameter int N = 32,  // Width of the data (N > 0)
   // Do not override the following parameter
-  parameter D_WIDTH = $clog2(N)  // Ceiling of log2(N)
+  parameter int D_WIDTH = $clog2(N)  // Ceiling of log2(N)
 ) (
   input  logic [      N-1:0] x,  // Input value to shift
   input  logic [D_WIDTH-1:0] d,  // Shift distance
   output logic [      N-1:0] z   // Output value
 );
 
-  logic [N-1:0] stage[D_WIDTH:0];  // Intermediate shifted values
+  logic [N-1:0] stage[D_WIDTH+1];  // Intermediate shifted values
 
   assign stage[0] = x;
 

hw/int/add/ripple_carry_adder.sv

@@ -13,7 +13,7 @@
 // Delay: O(N)
 
 module ripple_carry_adder #(
-  parameter N = 32
+  parameter int N = 32
 ) (
   input  logic [N-1:0] x,    // First operand
   input  logic [N-1:0] y,    // Second operand