[docs] Fix pipe rendering in markdown table (#4625)

chipsalliance · Jan 15, 2025 · 751971a · 751971a
1 parent be64e08
commit 751971a
Showing 1 changed file with 1 addition and 1 deletion.
diff --git a/docs/src/explanations/operators.md b/docs/src/explanations/operators.md
@@ -33,7 +33,7 @@ Chisel defines a set of hardware operators:
 | **Logical Operations**                      | **Valid on:** Bool
 | `val sleep = !busy`                         | Logical NOT                       |
 | `val hit = tagMatch && valid`               | Logical AND                       |
-| `val stall = src1busy || src2busy`          | Logical OR                        |
+| `val stall = src1busy \|\| src2busy`        | Logical OR                        |
 | `val out = Mux(sel, inTrue, inFalse)`       | Two-input mux where sel is a Bool |
 | **Arithmetic operations**                   | **Valid on Nums:** SInt and UInt.  |
 | `val sum = a + b` *or* `val sum = a +% b`   | Addition (without width expansion) |