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Move perr_dat_ff closer to ICACHE_ENABLED-gated logic
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Internal-tag: [#52136]
Signed-off-by: Rafal Kolucki <[email protected]>
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koluckirafal committed Dec 14, 2023
1 parent 811b064 commit b81270c
Showing 1 changed file with 21 additions and 13 deletions.
34 changes: 21 additions & 13 deletions design/ifu/el2_ifu_mem_ctl.sv
Original file line number Diff line number Diff line change
Expand Up @@ -281,11 +281,6 @@ import el2_pkg::*;
logic sel_mb_status_addr ;
logic [63:0] ic_final_data;

logic [pt.ICACHE_INDEX_HI:pt.ICACHE_TAG_INDEX_LO] ifu_ic_rw_int_addr_ff ;
logic [pt.ICACHE_INDEX_HI:pt.ICACHE_TAG_INDEX_LO] ifu_status_wr_addr_ff ;
logic [pt.ICACHE_INDEX_HI:pt.ICACHE_TAG_INDEX_LO] ifu_ic_rw_int_addr_w_debug ;
logic [pt.ICACHE_INDEX_HI:pt.ICACHE_TAG_INDEX_LO] ifu_status_wr_addr_w_debug ;

logic [pt.ICACHE_STATUS_BITS-1:0] way_status_new_ff ;
logic way_status_wr_en_ff ;
logic [pt.ICACHE_TAG_DEPTH-1:0][pt.ICACHE_STATUS_BITS-1:0] way_status_out ;
Expand Down Expand Up @@ -918,13 +913,10 @@ assign ic_rd_parity_final_err = ic_tag_perr & ~exu_flush_final & sel_ic_data & ~
(fetch_req_icache_f & ~reset_all_tags & (~miss_pending | (miss_state==HIT_U_MISS)) & ~sel_mb_addr_ff);

logic [pt.ICACHE_NUM_WAYS-1:0] perr_err_inv_way;
logic [pt.ICACHE_INDEX_HI:pt.ICACHE_TAG_INDEX_LO] perr_ic_index_ff;
logic perr_sel_invalidate;
logic perr_sb_write_status ;



rvdffe #(.WIDTH(pt.ICACHE_INDEX_HI-pt.ICACHE_TAG_INDEX_LO+1),.OVERRIDE(1)) perr_dat_ff (.din(ifu_ic_rw_int_addr_ff[pt.ICACHE_INDEX_HI:pt.ICACHE_TAG_INDEX_LO]), .dout(perr_ic_index_ff[pt.ICACHE_INDEX_HI : pt.ICACHE_TAG_INDEX_LO]), .en(perr_sb_write_status), .*);
`ifdef RV_ICACHE_ENABLE
logic perr_sb_write_status;
`endif

assign perr_err_inv_way[pt.ICACHE_NUM_WAYS-1:0] = {pt.ICACHE_NUM_WAYS{perr_sel_invalidate}} ;

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[verible-verilog-format] reported by reviewdog 🐶 Raw Output: design/ifu/el2_ifu_mem_ctl.sv:921:- assign perr_err_inv_way[pt.ICACHE_NUM_WAYS-1:0] = {pt.ICACHE_NUM_WAYS{perr_sel_invalidate}} ; design/ifu/el2_ifu_mem_ctl.sv:922:- assign iccm_correct_ecc = (perr_state == ECC_CORR); design/ifu/el2_ifu_mem_ctl.sv:923:- assign dma_sb_err_state = (perr_state == DMA_SB_ERR); design/ifu/el2_ifu_mem_ctl.sv:924:- assign iccm_buf_correct_ecc = iccm_correct_ecc & ~dma_sb_err_state_ff; design/ifu/el2_ifu_mem_ctl.sv:1059:+ assign perr_err_inv_way[pt.ICACHE_NUM_WAYS-1:0] = {pt.ICACHE_NUM_WAYS{perr_sel_invalidate}}; design/ifu/el2_ifu_mem_ctl.sv:1060:+ assign iccm_correct_ecc = (perr_state == ECC_CORR); design/ifu/el2_ifu_mem_ctl.sv:1061:+ assign dma_sb_err_state = (perr_state == DMA_SB_ERR); design/ifu/el2_ifu_mem_ctl.sv:1062:+ assign iccm_buf_correct_ecc = iccm_correct_ecc & ~dma_sb_err_state_ff;
assign iccm_correct_ecc = (perr_state == ECC_CORR);
Expand All @@ -944,14 +936,18 @@ logic perr_sb_write_status ;
always_comb begin : ERROR_SM
perr_nxtstate = ERR_IDLE;
perr_state_en = 1'b0;
perr_sb_write_status = 1'b0;
perr_sel_invalidate = 1'b0;
`ifdef RV_ICACHE_ENABLE
perr_sb_write_status = 1'b0;
`endif

case (perr_state)
ERR_IDLE: begin : err_idle
perr_nxtstate = iccm_dma_sb_error ? DMA_SB_ERR : (ic_error_start & ~exu_flush_final) ? IC_WFF : ECC_WFF;
perr_state_en = (((iccm_error_start | ic_error_start) & ~dec_tlu_flush_lower_wb) | iccm_dma_sb_error) & ~dec_tlu_force_halt;
`ifdef RV_ICACHE_ENABLE
perr_sb_write_status = perr_state_en;
`endif
end

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[verible-verilog-format] reported by reviewdog 🐶 Raw Output: design/ifu/el2_ifu_mem_ctl.sv:951:- end design/ifu/el2_ifu_mem_ctl.sv:952:- IC_WFF: begin : icache_wff // All the I$ data and/or Tag errors ( parity/ECC ) will come to this state design/ifu/el2_ifu_mem_ctl.sv:953:- perr_nxtstate = ERR_IDLE ; design/ifu/el2_ifu_mem_ctl.sv:954:- perr_state_en = dec_tlu_flush_lower_wb | dec_tlu_force_halt ; design/ifu/el2_ifu_mem_ctl.sv:955:- perr_sel_invalidate = (dec_tlu_flush_err_wb & dec_tlu_flush_lower_wb); design/ifu/el2_ifu_mem_ctl.sv:956:- end design/ifu/el2_ifu_mem_ctl.sv:957:- ECC_WFF: begin : ecc_wff design/ifu/el2_ifu_mem_ctl.sv:958:- perr_nxtstate = ((~dec_tlu_flush_err_wb & dec_tlu_flush_lower_wb ) | dec_tlu_force_halt) ? ERR_IDLE : ECC_CORR ; design/ifu/el2_ifu_mem_ctl.sv:959:- perr_state_en = dec_tlu_flush_lower_wb | dec_tlu_force_halt ; design/ifu/el2_ifu_mem_ctl.sv:960:- end design/ifu/el2_ifu_mem_ctl.sv:961:- DMA_SB_ERR : begin : dma_sb_ecc design/ifu/el2_ifu_mem_ctl.sv:962:- perr_nxtstate = dec_tlu_force_halt ? ERR_IDLE : ECC_CORR; design/ifu/el2_ifu_mem_ctl.sv:963:- perr_state_en = 1'b1; design/ifu/el2_ifu_mem_ctl.sv:964:- end design/ifu/el2_ifu_mem_ctl.sv:965:- ECC_CORR: begin : ecc_corr design/ifu/el2_ifu_mem_ctl.sv:966:- perr_nxtstate = ERR_IDLE ; design/ifu/el2_ifu_mem_ctl.sv:967:- perr_state_en = 1'b1 ; design/ifu/el2_ifu_mem_ctl.sv:968:- end design/ifu/el2_ifu_mem_ctl.sv:969:- default: begin : def_case design/ifu/el2_ifu_mem_ctl.sv:970:- perr_nxtstate = ERR_IDLE; design/ifu/el2_ifu_mem_ctl.sv:971:- perr_state_en = 1'b0; design/ifu/el2_ifu_mem_ctl.sv:972:- perr_sel_invalidate = 1'b0; design/ifu/el2_ifu_mem_ctl.sv:1089:+ end design/ifu/el2_ifu_mem_ctl.sv:1090:+ IC_WFF: begin : icache_wff // All the I$ data and/or Tag errors ( parity/ECC ) will come to this state design/ifu/el2_ifu_mem_ctl.sv:1091:+ perr_nxtstate = ERR_IDLE; design/ifu/el2_ifu_mem_ctl.sv:1092:+ perr_state_en = dec_tlu_flush_lower_wb | dec_tlu_force_halt; design/ifu/el2_ifu_mem_ctl.sv:1093:+ perr_sel_invalidate = (dec_tlu_flush_err_wb & dec_tlu_flush_lower_wb); design/ifu/el2_ifu_mem_ctl.sv:1094:+ end design/ifu/el2_ifu_mem_ctl.sv:1095:+ ECC_WFF: begin : ecc_wff design/ifu/el2_ifu_mem_ctl.sv:1096:+ perr_nxtstate = ((~dec_tlu_flush_err_wb & dec_tlu_flush_lower_wb ) | dec_tlu_force_halt) ? ERR_IDLE : ECC_CORR ; design/ifu/el2_ifu_mem_ctl.sv:1097:+ perr_state_en = dec_tlu_flush_lower_wb | dec_tlu_force_halt; design/ifu/el2_ifu_mem_ctl.sv:1098:+ end design/ifu/el2_ifu_mem_ctl.sv:1099:+ DMA_SB_ERR: begin : dma_sb_ecc design/ifu/el2_ifu_mem_ctl.sv:1100:+ perr_nxtstate = dec_tlu_force_halt ? ERR_IDLE : ECC_CORR; design/ifu/el2_ifu_mem_ctl.sv:1101:+ perr_state_en = 1'b1; design/ifu/el2_ifu_mem_ctl.sv:1102:+ end design/ifu/el2_ifu_mem_ctl.sv:1103:+ ECC_CORR: begin : ecc_corr design/ifu/el2_ifu_mem_ctl.sv:1104:+ perr_nxtstate = ERR_IDLE; design/ifu/el2_ifu_mem_ctl.sv:1105:+ perr_state_en = 1'b1; design/ifu/el2_ifu_mem_ctl.sv:1106:+ end design/ifu/el2_ifu_mem_ctl.sv:1107:+ default: begin : def_case design/ifu/el2_ifu_mem_ctl.sv:1108:+ perr_nxtstate = ERR_IDLE; design/ifu/el2_ifu_mem_ctl.sv:1109:+ perr_state_en = 1'b0; design/ifu/el2_ifu_mem_ctl.sv:1110:+ perr_sel_invalidate = 1'b0;
IC_WFF: begin : icache_wff // All the I$ data and/or Tag errors ( parity/ECC ) will come to this state
perr_nxtstate = ERR_IDLE ;
Expand All @@ -973,8 +969,10 @@ logic perr_sb_write_status ;
default: begin : def_case
perr_nxtstate = ERR_IDLE;
perr_state_en = 1'b0;
perr_sb_write_status = 1'b0;
perr_sel_invalidate = 1'b0;
`ifdef RV_ICACHE_ENABLE
perr_sb_write_status = 1'b0;
`endif
end

Check warning on line 976 in design/ifu/el2_ifu_mem_ctl.sv

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[verible-verilog-format] reported by reviewdog 🐶 Raw Output: design/ifu/el2_ifu_mem_ctl.sv:976:- end design/ifu/el2_ifu_mem_ctl.sv:977:- endcase design/ifu/el2_ifu_mem_ctl.sv:978:- end design/ifu/el2_ifu_mem_ctl.sv:979:- design/ifu/el2_ifu_mem_ctl.sv:980:- rvdffs #(($bits(perr_state_t))) perr_state_ff (.clk(active_clk), .din(perr_nxtstate), .dout({perr_state}), .en(perr_state_en), .*); design/ifu/el2_ifu_mem_ctl.sv:981:- design/ifu/el2_ifu_mem_ctl.sv:982:- //////////////////////////////////// Create stop fetch State Machine ///////////////////////// design/ifu/el2_ifu_mem_ctl.sv:983:- //////////////////////////////////// Create stop fetch State Machine ///////////////////////// design/ifu/el2_ifu_mem_ctl.sv:984:- //////////////////////////////////// Create stop fetch State Machine ///////////////////////// design/ifu/el2_ifu_mem_ctl.sv:985:- //////////////////////////////////// Create stop fetch State Machine ///////////////////////// design/ifu/el2_ifu_mem_ctl.sv:986:- //////////////////////////////////// Create stop fetch State Machine ///////////////////////// design/ifu/el2_ifu_mem_ctl.sv:987:- always_comb begin : ERROR_STOP_FETCH design/ifu/el2_ifu_mem_ctl.sv:988:- err_stop_nxtstate = ERR_STOP_IDLE; design/ifu/el2_ifu_mem_ctl.sv:989:- err_stop_state_en = 1'b0; design/ifu/el2_ifu_mem_ctl.sv:990:- err_stop_fetch = 1'b0; design/ifu/el2_ifu_mem_ctl.sv:991:- iccm_correction_state = 1'b0; design/ifu/el2_ifu_mem_ctl.sv:992:- design/ifu/el2_ifu_mem_ctl.sv:993:- case (err_stop_state) design/ifu/el2_ifu_mem_ctl.sv:994:- ERR_STOP_IDLE: begin : err_stop_idle design/ifu/el2_ifu_mem_ctl.sv:995:- err_stop_nxtstate = ERR_FETCH1; design/ifu/el2_ifu_mem_ctl.sv:996:- err_stop_state_en = dec_tlu_flush_err_wb & (perr_state == ECC_WFF) & ~dec_tlu_force_halt; design/ifu/el2_ifu_mem_ctl.sv:997:- end design/ifu/el2_ifu_mem_ctl.sv:998:- ERR_FETCH1: begin : err_fetch1 // All the I$ data and/or Tag errors ( parity/ECC ) will come to this state design/ifu/el2_ifu_mem_ctl.sv:999:- err_stop_nxtstate = (dec_tlu_flush_lower_wb | dec_tlu_i0_commit_cmt | dec_tlu_force_halt) ? ERR_STOP_IDLE : ((ifu_fetch_val[1:0] == 2'b11) | (ifu_fetch_val[0] & two_byte_instr)) ? ERR_STOP_FETCH : ifu_fetch_val[0] ? ERR_FETCH2 : ERR_FETCH1; design/ifu/el2_ifu_mem_ctl.sv:1000:- err_stop_state_en = dec_tlu_flush_lower_wb | dec_tlu_i0_commit_cmt | ifu_fetch_val[0] | ifu_bp_hit_taken_q_f | dec_tlu_force_halt; design/ifu/el2_ifu_mem_ctl.sv:1001:- err_stop_fetch = ((ifu_fetch_val[1:0] == 2'b11) | (ifu_fetch_val[0] & two_byte_instr)) & ~(exu_flush_final | dec_tlu_i0_commit_cmt); design/ifu/el2_ifu_mem_ctl.sv:1002:- iccm_correction_state = 1'b1; design/ifu/el2_ifu_mem_ctl.sv:1114:+ end design/ifu/el2_ifu_mem_ctl.sv:1115:+ endcase design/ifu/el2_ifu_mem_ctl.sv:1116:+ end
endcase
end
Expand Down Expand Up @@ -1393,6 +1391,16 @@ assign ic_write_stall = write_ic_16_bytes & ~((((miss_state== C
///////////////////////////////////////////////////////////////
logic [pt.ICACHE_NUM_WAYS-1:0] ic_tag_valid_unq;
if (pt.ICACHE_ENABLE == 1 ) begin: icache_enabled
logic [pt.ICACHE_INDEX_HI:pt.ICACHE_TAG_INDEX_LO] ifu_status_wr_addr_w_debug;
logic [pt.ICACHE_INDEX_HI:pt.ICACHE_TAG_INDEX_LO] ifu_status_wr_addr_ff ;
logic [pt.ICACHE_INDEX_HI:pt.ICACHE_TAG_INDEX_LO] ifu_ic_rw_int_addr_w_debug;
logic [pt.ICACHE_INDEX_HI:pt.ICACHE_TAG_INDEX_LO] ifu_ic_rw_int_addr_ff;
logic [pt.ICACHE_INDEX_HI:pt.ICACHE_TAG_INDEX_LO] perr_ic_index_ff;

`ifdef RV_ICACHE_ENABLE
rvdffe #(.WIDTH(pt.ICACHE_INDEX_HI-pt.ICACHE_TAG_INDEX_LO+1),.OVERRIDE(1)) perr_dat_ff (.din(ifu_ic_rw_int_addr_ff[pt.ICACHE_INDEX_HI:pt.ICACHE_TAG_INDEX_LO]), .dout(perr_ic_index_ff[pt.ICACHE_INDEX_HI : pt.ICACHE_TAG_INDEX_LO]), .en(perr_sb_write_status), .*);
`endif

assign ic_valid = ~ifu_wr_cumulative_err_data & ~(reset_ic_in | reset_ic_ff) & ~reset_tag_valid_for_miss;

assign ifu_status_wr_addr_w_debug[pt.ICACHE_INDEX_HI:pt.ICACHE_TAG_INDEX_LO] = ((ic_debug_rd_en | ic_debug_wr_en ) & ic_debug_tag_array) ?
Expand Down

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