update debug test to inject ecc errors

.github/scripts/openocd/veer-el2.cfg

@@ -24,48 +24,79 @@ $_TARGETNAME.0 riscv expose_csrs 1993=dicad0
 $_TARGETNAME.0 riscv expose_csrs 1994=dicad1
 $_TARGETNAME.0 riscv expose_csrs 1995=dicago
 
-$_TARGETNAME.0 configure -event halted {
-    echo "Starting ICache line read"
-    # 1. Write dicawics: array=0 way=0 index=16
-    reg csr_dicawics 128
+proc write_icache_line {dicawics_ dicad0_ dicad0h_ dicad1_} {
+    # 1. Write dicawics
+    reg csr_dicawics $dicawics_
+    # 2. Write instruction data to dicad0 and dicad0h, and parity to dicad1
+    reg csr_dicad0 $dicad0_
+    reg csr_dicad0h $dicad0h_
+    reg csr_dicad1 $dicad1_
+    # 3. Write 1 to dicago to trigger Icache write operation
+    reg csr_dicago 1
+}
+
+proc read_icache_line {dicawics_} {
+    # 1. Write dicawics
+    reg csr_dicawics $dicawics_
     # 2. Read to dicago to trigger Icache read operation
     reg csr_dicago
     # 3. get line chunk from dicad0 and dicad0h, and parity from dicad1
     reg csr_dicad0
     reg csr_dicad0h
     reg csr_dicad1
+}
 
-    echo "Starting ICache line write"
-    # 1. Write dicawics: array=0 way=0 index=8
-    reg csr_dicawics 64
-    # 2. Write instruction data to dicad0 and dicad0h, and parity to dicad1
-    # [31:16] have two ones and [15:0] have two ones in order to make parity 0
-    reg csr_dicad0 0x30c00
-    reg csr_dicad0h 0xc00c0
-    # parity is 0.
-    # TODO do we need to set anything ECC-related?
-    reg csr_dicad1 0x0
+proc write_icache_tag {dicawics_ dicad0_ dicad1_} {
+    # 1. Write dicawics
+    reg csr_dicawics $dicawics_
+    # 2. Write tag, valid, LRU information to dicad0, and parity to dicad1
+    reg csr_dicad0 $dicad0_
+    reg csr_dicad1 $dicad1_
     # 3. Write 1 to dicago to trigger Icache write operation
     reg csr_dicago 1
+}
 
-    echo "Starting ICache tag and status read"
-    # 1. Write dicawics: array=1 way=0 index=8
-    reg csr_dicawics 0x1000040
+proc read_icache_tag {dicawics_} {
+    # 1. Write dicawics
+    reg csr_dicawics $dicawics_
     # 2. Read to dicago to trigger Icache read operation
     reg csr_dicago
     # 3. get tag from dicad0, and parity from dicad1
     reg csr_dicad0
     reg csr_dicad1
+}
 
-    echo "Starting ICache tag and status write"
-    # 1. Write dicawics: array=1 way=0 index=8
-    reg csr_dicawics 0x1000040
-    # 2. Write tag, valid, LRU information to dicad0, and parity to dicad1
-    reg csr_dicad0 0x0
-    reg csr_dicad1 0x0
-    # 3. Write 1 to dicago to trigger Icache write operation
-    reg csr_dicago 1
+$_TARGETNAME.0 configure -event halted {
+    echo "Starting ICache line read"
+    # dicawics: array=0 way=1 index=1
+    set dicawics_value [expr {(0 << 24) | (1 << 20) | (1 << 5)}]
+    read_icache_line $dicawics_value
+
+    echo "Starting ICache line write"
+    # Write instruction data to dicad0 and dicad0h
+    set dicad0_value 0x30c00
+    set dicad0h_value 0xc00c0
+    # Write wrong parity to trigger error
+    set dicad1_value 0xffffaaaa
+    # iterate to perform write for many values of index
+    for {set index 0} {$index < 5} {incr index} {
+        # dicawics: array=0 way=1
+        set dicawics_value [expr {(0 << 24) | (1 << 20) | ($index << 5)}]
+        write_icache_line $dicawics_value $dicad0_value $dicad0h_value $dicad1_value
+    }
 
+    echo "Starting ICache tag and status read"
+    read_icache_tag $dicawics_value
+
+    echo "Starting ICache tag and status write"
+    # Write tag, valid, LRU information are in dicad0, parity is in dicad1
+    set dicad0_value 0xfcb
+    set dicad1_value 0xffffffff
+    for {set index 0} {$index < 5} {incr index} {
+    # dicawics: array=1 way=1
+    set dicawics_value [expr {(1 << 24) | (1 << 20) | ($index << 5)}]
+    write_icache_tag $dicawics_value $dicad0_value $dicad1_value
+    }
     echo "ICache test done."
 }