arm64/dts: gs101: add g3aa core and cmu block to pdp

This is for fix PMU kernel panic when power down blkpwr_g3aa
due to LH still transmission between PDP and G3AA.
Add g3aa core and cmu block to pdp to make pdp can write g3aa
registers before PDP ip reset to prevent this issue.

This is on top of fixes that were already submitted for b/193588766.

Bug: 190229966
Test: GCA, CTS, unit test, stress script
Signed-off-by: Holmes Chou <[email protected]>
Change-Id: I7407a6c748946478f2610fd695bac3d82d973e26
(cherry picked from commit aa38bb9)

arch/arm64/boot/dts/google/gs101-isp.dtsi

@@ -395,7 +395,9 @@
 			<0x0 0x1A820400 0x4>,     /* SYSREG G3AA */
 			<0x0 0x1AC40000 0x10000>, /* IPP CORE0 */
 			<0x0 0x1AC50000 0x10000>, /* IPP CORE1 */
-			<0x0 0x1AC60000 0x10000>; /* IPP CORE2 */
+			<0x0 0x1AC60000 0x10000>, /* IPP CORE2 */
+			<0x0 0x1A840000 0x20000>, /* G3AA */
+			<0x0 0x1A800000 0x10000>; /* G3AA CMU*/
 		reg-names =
 			"pdp-core0",
 			"pdp-core1",
@@ -404,7 +406,9 @@
 			"sysreg-g3aa",
 			"ipp-core0",
 			"ipp-core1",
-			"ipp-core2";
+			"ipp-core2",
+			"g3aa-core",
+			"g3aa-cmu";
 
 		clocks =
 			<&clock UMUX_CLKCMU_PDP_BUS>,