Merge "Merge android13-gs-pixel-5.10-tm-qpr1 into android13-gs-pixel-…

…5.10-tm-qpr2" into android13-gs-pixel-5.10-tm-qpr2
celtare21 · Oct 27, 2022 · 408102b · 408102b
2 parents f8d219c + 024f8d0
commit 408102b
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Showing 5 changed files with 35 additions and 1 deletion.
diff --git a/drivers/media/platform/exynos/mfc/mfc_core_enc_param.c b/drivers/media/platform/exynos/mfc/mfc_core_enc_param.c
@@ -337,7 +337,10 @@ static void __mfc_set_enc_params(struct mfc_core *core, struct mfc_ctx *ctx)
 			mfc_clear_set_bits(reg, 0x3, 24, 1);
 		else if (ctx->sbwcl_ratio == 75 || ctx->sbwcl_ratio == 80)
 			mfc_clear_set_bits(reg, 0x3, 24, 2);
+	} else {
+			mfc_clear_set_bits(reg, 0x3, 24, 0);
 	}
+
 	/* GDC-MFC vOTF enable */
 	mfc_clear_bits(reg, 0x1, 26);
 	if (ctx->gdc_votf && core->has_gdc_votf && core->has_mfc_votf) {

diff --git a/drivers/media/platform/exynos/mfc/mfc_core_isr.c b/drivers/media/platform/exynos/mfc/mfc_core_isr.c
@@ -1348,6 +1348,7 @@ static int __mfc_handle_stream(struct mfc_core *core, struct mfc_ctx *ctx, unsig
 	int slice_type, consumed_only = 0;
 	unsigned int strm_size;
 	unsigned int pic_count;
+	unsigned int sbwc_err;
 
 	slice_type = mfc_core_get_enc_slice_type();
 	strm_size = mfc_core_get_enc_strm_size();
@@ -1383,6 +1384,17 @@ static int __mfc_handle_stream(struct mfc_core *core, struct mfc_ctx *ctx, unsig
 		consumed_only = 1;
 	}
 
+	sbwc_err = mfc_core_get_enc_comp_err();
+	if (sbwc_err) {
+		mfc_ctx_err("[SBWC] Compressor error detected (Source: %d, DPB: %d)\n",
+				(sbwc_err >> 1) & 0x1, sbwc_err & 0x1);
+		mfc_ctx_err("[SBWC] sbwc: %d, lossy: %d(%d), option: %d, FORMAT: %#x, OPTIONS: %#x\n",
+				ctx->is_sbwc, ctx->is_sbwc_lossy,
+				ctx->sbwcl_ratio, enc->sbwc_option,
+				MFC_CORE_READL(MFC_REG_PIXEL_FORMAT),
+				MFC_CORE_READL(MFC_REG_E_ENC_OPTIONS));
+	}
+
 	/* handle source buffer */
 	__mfc_handle_stream_input(core, ctx, consumed_only);
 

diff --git a/drivers/media/platform/exynos/mfc/mfc_core_nal_q.c b/drivers/media/platform/exynos/mfc/mfc_core_nal_q.c
@@ -1496,6 +1496,7 @@ static void __mfc_core_nal_q_handle_stream(struct mfc_core *core, struct mfc_cor
 	int slice_type, consumed_only = 0;
 	unsigned int strm_size;
 	unsigned int pic_count;
+	unsigned int sbwc_err;
 
 	mfc_debug_enter();
 
@@ -1515,10 +1516,22 @@ static void __mfc_core_nal_q_handle_stream(struct mfc_core *core, struct mfc_cor
 	ctx->sequence++;
 
 	if (strm_size == 0) {
-		mfc_debug(2, "[FRAME] dst buffer is not returned\n");
+		mfc_debug(2, "[NALQ][STREAM] dst buffer is not returned\n");
 		consumed_only = 1;
 	}
 
+	sbwc_err = ((pOutStr->NalDoneInfo >> MFC_REG_E_NAL_DONE_INFO_COMP_ERR_SHIFT)
+			& MFC_REG_E_NAL_DONE_INFO_COMP_ERR_MASK);
+	if (sbwc_err) {
+		mfc_ctx_err("[NALQ][SBWC] Compressor error detected (Source: %d, DPB: %d)\n",
+				(sbwc_err >> 1) & 0x1, sbwc_err & 0x1);
+		mfc_ctx_err("[SBWC] sbwc: %d, lossy: %d(%d), option: %d, FORMAT: %#x, OPTIONS: %#x\n",
+				ctx->is_sbwc, ctx->is_sbwc_lossy,
+				ctx->sbwcl_ratio, enc->sbwc_option,
+				MFC_CORE_READL(MFC_REG_PIXEL_FORMAT),
+				MFC_CORE_READL(MFC_REG_E_ENC_OPTIONS));
+	}
+
 	/* handle input buffer */
 	__mfc_core_nal_q_handle_stream_input(core_ctx, pOutStr, consumed_only);
 

diff --git a/drivers/media/platform/exynos/mfc/mfc_core_reg_api.h b/drivers/media/platform/exynos/mfc/mfc_core_reg_api.h
@@ -217,6 +217,10 @@
 	((MFC_CORE_READL(MFC_REG_E_NAL_DONE_INFO)		\
 	>> MFC_REG_E_NAL_DONE_INFO_IDR_SHIFT)			\
 	& MFC_REG_E_NAL_DONE_INFO_IDR_MASK)
+#define mfc_core_get_enc_comp_err()					\
+	((MFC_CORE_READL(MFC_REG_E_NAL_DONE_INFO)		\
+	>> MFC_REG_E_NAL_DONE_INFO_COMP_ERR_SHIFT)			\
+	& MFC_REG_E_NAL_DONE_INFO_COMP_ERR_MASK)
 #define mfc_core_get_chroma_format()		(MFC_CORE_READL(MFC_REG_D_CHROMA_FORMAT)		\
 						& MFC_REG_D_CHROMA_FORMAT_MASK)
 #define mfc_core_get_color_range()		((MFC_CORE_READL(MFC_REG_D_CHROMA_FORMAT)	\

diff --git a/drivers/media/platform/exynos/mfc/mfc_regs.h b/drivers/media/platform/exynos/mfc/mfc_regs.h
@@ -959,6 +959,8 @@
 #define MFC_REG_E_SLICE_TYPE_SKIPPED			4
 
 /* 0xFAEC: MFC_REG_E_NAL_DONE_INFO */
+#define MFC_REG_E_NAL_DONE_INFO_COMP_ERR_MASK		0x3
+#define MFC_REG_E_NAL_DONE_INFO_COMP_ERR_SHIFT		7
 #define MFC_REG_E_NAL_DONE_INFO_IDR_MASK		0x1
 #define MFC_REG_E_NAL_DONE_INFO_IDR_SHIFT		20