Add integration test

.github/workflows/ci.yml

@@ -36,7 +36,7 @@ jobs:
       contents: write
     env:
       default-branch: ${{ format('refs/heads/{0}', github.event.repository.default_branch) }}
-      RUSTDOCFLAGS: -D rustdoc::broken_intra_doc_links
+      RUSTDOCFLAGS: -D rustdoc::broken_intra_doc_links -D missing-docs
     steps:
     - uses: actions/checkout@v4
     - uses: dtolnay/rust-toolchain@nightly

README.md

@@ -1,6 +1,6 @@
 # axconfig-gen
 
-A TOML-based configuration generator for ArceOS.
+A TOML-based configuration generation tool for [ArceOS](https://github.com/arceos-org/arceos).
 
 ## Usage
 
@@ -11,14 +11,15 @@ Options:
   -s, --spec <SPEC>            Path to the config specification file
   -c, --oldconfig <OLDCONFIG>  Path to the old config file
   -o, --output <OUTPUT>        Path to the output config file
+  -f, --fmt <FMT>              The output format [default: toml] [possible values: toml, rust]
   -h, --help                   Print help
   -V, --version                Print version
 ```
 
 For example, to generate a config file `.axconfig.toml` from the config specifications distributed in `a.toml` and `b.toml`, you can run:
 
 ```sh
-axconfig-gen -s a.toml -s b.toml -o .axconfig.toml
+axconfig-gen -s a.toml -s b.toml -o .axconfig.toml -f toml
 ```
 
 See [defconfig.toml](example_configs/defconfig.toml) for an example of a config specification file.

example_configs/output.rs

@@ -0,0 +1,65 @@
+/// Architecture identifier.
+pub const ARCH: &str = "x86_64";
+/// Platform identifier.
+pub const PLAT: &str = "x86_64-qemu-q35";
+/// Number of CPUs
+pub const SMP: usize = 1;
+
+///
+/// Device specifications
+///
+mod device {
+    /// MMIO regions with format (`base_paddr`, `size`).
+    pub const MMIO_REGIONS: &[(usize, usize)] = &[
+        (0xb000_0000, 0x1000_0000),
+        (0xfe00_0000, 0xc0_0000),
+        (0xfec0_0000, 0x1000),
+        (0xfed0_0000, 0x1000),
+        (0xfee0_0000, 0x1000),
+    ];
+    /// End PCI bus number.
+    pub const PCI_BUS_END: usize = 0;
+    /// Base physical address of the PCIe ECAM space (should read from ACPI 'MCFG' table).
+    pub const PCI_ECAM_BASE: usize = 0;
+    /// PCI device memory ranges (not used on x86).
+    pub const PCI_RANGES: &[(usize, usize)] = &[];
+    /// VirtIO MMIO regions with format (`base_paddr`, `size`).
+    pub const VIRTIO_MMIO_REGIONS: &[(usize, usize)] = &[];
+}
+
+///
+/// Kernel configs
+///
+mod kernel {
+    /// Stack size of each task.
+    pub const TASK_STACK_SIZE: usize = 0;
+    /// Number of timer ticks per second (Hz). A timer tick may contain several timer
+    /// interrupts.
+    pub const TICKS_PER_SEC: usize = 0;
+}
+
+///
+/// Platform configs
+///
+mod platform {
+    /// Kernel address space base.
+    pub const KERNEL_ASPACE_BASE: usize = 0xffff_ff80_0000_0000;
+    /// Kernel address space size.
+    pub const KERNEL_ASPACE_SIZE: usize = 0x0000_007f_ffff_f000;
+    /// Base physical address of the kernel image.
+    pub const KERNEL_BASE_PADDR: usize = 0x20_0000;
+    /// Base virtual address of the kernel image.
+    pub const KERNEL_BASE_VADDR: usize = 0xffff_ff80_0020_0000;
+    /// Offset of bus address and phys address. some boards, the bus address is
+    /// different from the physical address.
+    pub const PHYS_BUS_OFFSET: usize = 0;
+    /// Base address of the whole physical memory.
+    pub const PHYS_MEMORY_BASE: usize = 0;
+    /// Size of the whole physical memory.
+    pub const PHYS_MEMORY_SIZE: usize = 0x800_0000;
+    /// Linear mapping offset, for quick conversions between physical and virtual
+    /// addresses.
+    pub const PHYS_VIRT_OFFSET: usize = 0xffff_ff80_0000_0000;
+    /// Timer interrupt frequencyin Hz.
+    pub const TIMER_FREQUENCY: usize = 0;
+}

example_configs/output.toml

@@ -0,0 +1,62 @@
+# Architecture identifier.
+arch = "x86_64"
+# Platform identifier.
+plat = "x86_64-qemu-q35"
+# Number of CPUs
+smp = 1
+
+#
+# Device specifications
+#
+[device]
+# MMIO regions with format (`base_paddr`, `size`).
+mmio-regions = [
+    ["0xb000_0000", "0x1000_0000"],
+    ["0xfe00_0000", "0xc0_0000"],
+    ["0xfec0_0000", "0x1000"],
+    ["0xfed0_0000", "0x1000"],
+    ["0xfee0_0000", "0x1000"]
+]
+# End PCI bus number.
+pci-bus-end = 0
+# Base physical address of the PCIe ECAM space (should read from ACPI 'MCFG' table).
+pci-ecam-base = 0
+# PCI device memory ranges (not used on x86).
+pci-ranges = []
+# VirtIO MMIO regions with format (`base_paddr`, `size`).
+virtio-mmio-regions = []
+
+#
+# Kernel configs
+#
+[kernel]
+# Stack size of each task.
+task-stack-size = 0
+# Number of timer ticks per second (Hz). A timer tick may contain several timer
+# interrupts.
+ticks-per-sec = 0
+
+#
+# Platform configs
+#
+[platform]
+# Kernel address space base.
+kernel-aspace-base = "0xffff_ff80_0000_0000"
+# Kernel address space size.
+kernel-aspace-size = "0x0000_007f_ffff_f000"
+# Base physical address of the kernel image.
+kernel-base-paddr = 0x20_0000
+# Base virtual address of the kernel image.
+kernel-base-vaddr = "0xffff_ff80_0020_0000"
+# Offset of bus address and phys address. some boards, the bus address is
+# different from the physical address.
+phys-bus-offset = 0
+# Base address of the whole physical memory.
+phys-memory-base = 0
+# Size of the whole physical memory.
+phys-memory-size = 0x800_0000
+# Linear mapping offset, for quick conversions between physical and virtual
+# addresses.
+phys-virt-offset = "0xffff_ff80_0000_0000"
+# Timer interrupt frequencyin Hz.
+timer-frequency = 0

src/tests.rs

@@ -1,4 +1,4 @@
-use crate::{ConfigErr, ConfigResult, ConfigType, ConfigValue};
+use crate::{Config, ConfigErr, ConfigResult, ConfigType, ConfigValue, OutputFormat};
 
 fn check_type_infer(value: &str, expect_ty: &str) -> ConfigResult<()> {
     let value = ConfigValue::new(value)?;
@@ -177,3 +177,14 @@ fn test_to_rust() {
     assert_eq!(ty.to_rust_type(), "&[&[(usize, &[&str], usize)]]");
     assert_eq!(value.to_rust_value(&ty, 0).unwrap(), rust);
 }
+
+#[test]
+fn integration_test() -> std::io::Result<()> {
+    let spec = std::fs::read_to_string("example_configs/defconfig.toml")?;
+    let toml = std::fs::read_to_string("example_configs/output.toml")?;
+    let rust = std::fs::read_to_string("example_configs/output.rs")?;
+    let cfg = Config::from_toml(&spec).unwrap();
+    assert_eq!(cfg.dump(OutputFormat::Toml).unwrap(), toml);
+    assert_eq!(cfg.dump(OutputFormat::Rust).unwrap(), rust);
+    Ok(())
+}