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boards/stm32/nucleo-f429zi: update netnsh defconfig #15727

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Jan 31, 2025
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boards/stm32/nucleo-f429zi: update netnsh defconfig #15727

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30f2073
boards/stm32/nucleo-f429zi: update netnsh defconfig
LuchianMihai Jan 30, 2025
b3cea35
feat: drop legacy pinmap for nsh config
LuchianMihai Jan 30, 2025
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4 changes: 4 additions & 0 deletions boards/arm/stm32/nucleo-f429zi/configs/netnsh/defconfig
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Original file line number Diff line number Diff line change
Expand Up @@ -7,6 +7,7 @@
#
# CONFIG_ARCH_FPU is not set
# CONFIG_STM32_FLASH_PREFETCH is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
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CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-f429zi"
CONFIG_ARCH_BOARD_NUCLEO_F429ZI=y
Expand All @@ -30,7 +31,10 @@ CONFIG_LINE_MAX=64
CONFIG_MM_REGIONS=2
CONFIG_NET=y
CONFIG_NETDB_DNSCLIENT=y
CONFIG_NETINIT_DHCPC=y
CONFIG_NETINIT_NOMAC=y
CONFIG_NETUTILS_DISCOVER=y
CONFIG_NETUTILS_TELNETD=y
CONFIG_NETUTILS_WEBCLIENT=y
CONFIG_NET_ARP_IPIN=y
CONFIG_NET_BROADCAST=y
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1 change: 1 addition & 0 deletions boards/arm/stm32/nucleo-f429zi/configs/nsh/defconfig
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Original file line number Diff line number Diff line change
Expand Up @@ -7,6 +7,7 @@
#
# CONFIG_ARCH_FPU is not set
# CONFIG_STM32_FLASH_PREFETCH is not set
# CONFIG_STM32_USE_LEGACY_PINMAP is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-f429zi"
CONFIG_ARCH_BOARD_NUCLEO_F429ZI=y
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59 changes: 33 additions & 26 deletions boards/arm/stm32/nucleo-f429zi/include/board.h
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Original file line number Diff line number Diff line change
Expand Up @@ -247,10 +247,10 @@

/* TIM */

#define GPIO_TIM1_CH1OUT GPIO_TIM1_CH1OUT_1
#define GPIO_TIM2_CH1OUT GPIO_TIM2_CH1OUT_1
#define GPIO_TIM3_CH1OUT GPIO_TIM3_CH1OUT_1
#define GPIO_TIM4_CH1OUT GPIO_TIM4_CH1OUT_1
#define GPIO_TIM1_CH1OUT (GPIO_TIM1_CH1OUT_1|GPIO_SPEED_50MHz)
#define GPIO_TIM2_CH1OUT (GPIO_TIM2_CH1OUT_1|GPIO_SPEED_50MHz)
#define GPIO_TIM3_CH1OUT (GPIO_TIM3_CH1OUT_1|GPIO_SPEED_50MHz)
#define GPIO_TIM4_CH1OUT (GPIO_TIM4_CH1OUT_1|GPIO_SPEED_50MHz)

#if defined(CONFIG_NUCLEO_F429ZI_CONSOLE_ARDUINO)

Expand All @@ -268,17 +268,17 @@
* -- ----- --------- -----
*/

# define GPIO_USART6_RX GPIO_USART6_RX_2
# define GPIO_USART6_TX GPIO_USART6_TX_2
# define GPIO_USART6_RX (GPIO_USART6_RX_2|GPIO_SPEED_100MHz)
# define GPIO_USART6_TX (GPIO_USART6_TX_2|GPIO_SPEED_100MHz)
#endif

/* USART3:
* Use USART3 and the USB virtual COM port
*/

#if defined(CONFIG_NUCLEO_F429ZI_CONSOLE_VIRTUAL)
# define GPIO_USART3_RX GPIO_USART3_RX_3
# define GPIO_USART3_TX GPIO_USART3_TX_3
# define GPIO_USART3_RX (GPIO_USART3_RX_3|GPIO_SPEED_100MHz)
# define GPIO_USART3_TX (GPIO_USART3_TX_3|GPIO_SPEED_100MHz)
#endif

/* DMA channels *************************************************************/
Expand All @@ -305,17 +305,17 @@
* PB3 SPI3_SCK CN12-31
*/

#define GPIO_SPI1_MISO GPIO_SPI1_MISO_1
#define GPIO_SPI1_MOSI GPIO_SPI1_MOSI_1
#define GPIO_SPI1_SCK GPIO_SPI1_SCK_1
#define GPIO_SPI1_MISO (GPIO_SPI1_MISO_1|GPIO_SPEED_50MHz)
#define GPIO_SPI1_MOSI (GPIO_SPI1_MOSI_1|GPIO_SPEED_50MHz)
#define GPIO_SPI1_SCK (GPIO_SPI1_SCK_1|GPIO_SPEED_50MHz)

#define GPIO_SPI2_MISO GPIO_SPI2_MISO_1
#define GPIO_SPI2_MOSI GPIO_SPI2_MOSI_1
#define GPIO_SPI2_SCK GPIO_SPI2_SCK_3
#define GPIO_SPI2_MISO (GPIO_SPI2_MISO_1|GPIO_SPEED_50MHz)
#define GPIO_SPI2_MOSI (GPIO_SPI2_MOSI_1|GPIO_SPEED_50MHz)
#define GPIO_SPI2_SCK (GPIO_SPI2_SCK_3|GPIO_SPEED_50MHz)

#define GPIO_SPI3_MISO GPIO_SPI3_MISO_1
#define GPIO_SPI3_MOSI GPIO_SPI3_MOSI_2
#define GPIO_SPI3_SCK GPIO_SPI3_SCK_1
#define GPIO_SPI3_MISO (GPIO_SPI3_MISO_1|GPIO_SPEED_50MHz)
#define GPIO_SPI3_MOSI (GPIO_SPI3_MOSI_2|GPIO_SPEED_50MHz)
#define GPIO_SPI3_SCK (GPIO_SPI3_SCK_1|GPIO_SPEED_50MHz)

/* I2C
*
Expand All @@ -331,14 +331,14 @@
*
*/

#define GPIO_I2C1_SCL GPIO_I2C1_SCL_2
#define GPIO_I2C1_SDA GPIO_I2C1_SDA_2
#define GPIO_I2C1_SCL (GPIO_I2C1_SCL_2|GPIO_SPEED_50MHz)
#define GPIO_I2C1_SDA (GPIO_I2C1_SDA_2|GPIO_SPEED_50MHz)

#define GPIO_I2C2_SCL GPIO_I2C2_SCL_1
#define GPIO_I2C2_SDA GPIO_I2C2_SDA_1
#define GPIO_I2C2_SCL (GPIO_I2C2_SCL_1|GPIO_SPEED_50MHz)
#define GPIO_I2C2_SDA (GPIO_I2C2_SDA_1|GPIO_SPEED_50MHz)

#define GPIO_I2C3_SCL GPIO_I2C3_SCL_1
#define GPIO_I2C3_SDA GPIO_I2C3_SDA_1
#define GPIO_I2C3_SCL (GPIO_I2C3_SCL_1|GPIO_SPEED_50MHz)
#define GPIO_I2C3_SDA (GPIO_I2C3_SDA_1|GPIO_SPEED_50MHz)

/* The STM32 F4 connects to a SMSC LAN8742A PHY using these pins:
*
Expand All @@ -362,8 +362,15 @@
* PG2 is not controlled but appears to result in a PHY address of 0.
*/

#define GPIO_ETH_RMII_TX_EN GPIO_ETH_RMII_TX_EN_2
#define GPIO_ETH_RMII_TXD0 GPIO_ETH_RMII_TXD0_2
#define GPIO_ETH_RMII_TXD1 GPIO_ETH_RMII_TXD1_1
#define GPIO_ETH_RMII_TX_EN (GPIO_ETH_RMII_TX_EN_2|GPIO_SPEED_100MHz)
#define GPIO_ETH_RMII_TXD0 (GPIO_ETH_RMII_TXD0_2|GPIO_SPEED_100MHz)
#define GPIO_ETH_RMII_TXD1 (GPIO_ETH_RMII_TXD1_1|GPIO_SPEED_100MHz)

#define GPIO_ETH_MDC (GPIO_ETH_MDC_0|GPIO_SPEED_100MHz)
#define GPIO_ETH_MDIO (GPIO_ETH_MDIO_0|GPIO_SPEED_100MHz)
#define GPIO_ETH_RMII_CRS_DV (GPIO_ETH_RMII_CRS_DV_0|GPIO_SPEED_100MHz)
#define GPIO_ETH_RMII_REF_CLK (GPIO_ETH_RMII_REF_CLK_0|GPIO_SPEED_100MHz)
#define GPIO_ETH_RMII_RXD0 (GPIO_ETH_RMII_RXD0_0|GPIO_SPEED_100MHz)
#define GPIO_ETH_RMII_RXD1 (GPIO_ETH_RMII_RXD1_0|GPIO_SPEED_100MHz)

#endif /* __BOARDS_ARM_STM32F4_NUCLEO_F429ZI_INCLUDE_BOARD_H */
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