arch/ra: Add support for Renesas RA4M1 MCU

Add basic support for RA4M1 and arduino-r4-minima. The following perpheral are added: * GPIO * SCI (UART) * Clock (Just internal clock - HOCO) Signed-off-by: leocafonso <[email protected]>
apache · Feb 23, 2025 · 4848784 · 4848784
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diff --git a/Documentation/platforms/arm/ra4m1/boards/arduino-r4-minima/arduino-r4-minima.png b/Documentation/platforms/arm/ra4m1/boards/arduino-r4-minima/arduino-r4-minima.png
diff --git a/Documentation/platforms/arm/ra4m1/boards/arduino-r4-minima/index.rst b/Documentation/platforms/arm/ra4m1/boards/arduino-r4-minima/index.rst
@@ -0,0 +1,106 @@
+=================
+Arduino R4 Minima
+=================
+
+This board features the R7FA4M1ABxCFM MCU with 256 KiB of FLASH
+and 32 KiB of SRAM running at 64 MHz (internal clock - HOCO).
+
+.. figure:: arduino-r4-minima.png
+   :align: center
+
+See the `Arduino website <https://docs.arduino.cc/hardware/uno-r4-minima/>`_ for
+information about Arduino R4 Minima.
+
+Buttons and LEDs
+================
+
+Buttons
+-------
+
+There are no buttons on the Arduino R4 Minima board.
+
+LEDs
+----
+
+There are three user-controllable LEDs on board the Arduino R4 Minima:
+
+    ==============   =====
+    LED              GPIO
+    ==============   =====
+    L   Amber LED    P111
+    TX  Yellow LED   P012
+    RX  Yellow LED   P013
+    ==============   =====
+
+LED L is connected to ground and can be illuminated by driving the P111
+output high. The TX and RX LEDs are pulled high and can be illuminated by
+driving the corresponding GPIO output low.
+
+These LEDs are not used by the board port unless ``CONFIG_ARCH_LEDS`` is
+defined. In that case, the usage by the board port is defined in
+``include/board.h`` and ``src/ra_autoleds.c``. The LEDs are used to encode OS-related
+events as follows:
+
+    ==================  =========================  ======    =====   =====
+    SYMBOL              MEANING                       L       TX       RX
+    ==================  =========================  ======    =====   =====
+    LED_STARTED          NuttX has been started     OFF      OFF      OFF
+    LED_HEAPALLOCATE     Heap has been allocated    OFF      OFF      OFF
+    LED_IRQSENABLED      Interrupts enabled         OFF      OFF      OFF
+    LED_STACKCREATED     Idle stack created         ON       OFF      OFF
+    LED_INIRQ            In an interrupt            N/C      GLOW     OFF
+    LED_SIGNAL           In a signal handler        N/C      GLOW     OFF
+    LED_ASSERTION        An assertion failed        N/C      GLOW     OFF
+    LED_PANIC            The system has crashed     N/C      N/C      Blinking
+    LED_IDLE             MCU is in sleep mode       NA       NA       NA
+    ==================  =========================  ======    =====   =====
+
+
+Thus, if LED L is statically on, NuttX has successfully booted and is
+apparently running normally. If LED RX is glowing, then NuttX is
+handling interrupts (and also signals and assertions). If TX is flashing
+at approximately 2 Hz, then a fatal error has been detected, and the system
+has halted.
+
+Serial Consoles
+===============
+
+The R7FA4M1ABxCFM has a UART and 4 SCI (UARTs).
+
+Any of the SCI interfaces may be used as a serial console. By default,
+SCI2 is used as the serial console in all configurations. This can be
+easily changed by modifying the configuration.
+
+    ==================   ============
+    Arduino R4 Minima    R7FA4M1ABxCFM
+    Pin (Label)          SCI Mapping
+    ==================   ============
+    0  (RX0<-0)          RXD2
+    1  (TX0->1)          TXD2
+    13 (12)              RXD9
+    14 (~11)             TXD9
+    SWD-7                RXD1
+    SWD-8                TXD1
+    ==================   ============
+
+Loading Code
+============
+
+It is possible to use J-Link on the SWD connector or use USB Boot
+available through the USB-C connector.
+
+RA USB Boot:
+------------
+
+Reboot the board with BOOT shorted to GND and press the reset button twice (double click). The board will enumerate as "Renesas RA USB Boot."
+
+Then, flash the ``nuttx.hex`` file using ``rfp-cli``:
+(https://www.renesas.com/en/software-tool/renesas-flash-programmer-programming-gui)
+
+Example command:
+
+.. code-block:: bash
+
+    rfp-cli -device ra -port /dev/ttyACM0 -p ./build/nuttx.hex
+
+*Note:* Programming using the binary format will fail because, by default, the RA4M1 NuttX port writes to the ``.idcode`` section, which is located beyond the end of the flash area. This causes the RFP to attempt writing to protected regions, leading to failures.
diff --git a/Documentation/platforms/arm/ra4m1/index.rst b/Documentation/platforms/arm/ra4m1/index.rst
@@ -0,0 +1,85 @@
+=============
+Renesas RA4M1
+=============
+
+Supported MCUs
+==============
+
+The following list includes MCUs from RA4M1 series and indicates whether
+they are supported in NuttX
+
+=============  ======= ================
+MCU            Support Note
+=============  ======= ================
+R7FA4M1ABxCFP  Yes
+R7FA4M1ABxCLJ  No
+R7FA4M1ABxCFM  Yes
+R7FA4M1ABxCNB  No
+R7FA4M1ABxCFL  Yes
+R7FA4M1ABxCNE  No
+R7FA4M1ABxCNF  No
+=============  ======= ================
+
+Peripheral Support
+==================
+
+The following list indicates peripherals supported in NuttX:
+
+==========  =======  =====================================
+Peripheral  Support  Notes
+==========  =======  =====================================
+FLASH       No
+CLOCK       Yes      Partially, just internal clock (HOCO)
+ICU         Yes
+KINT        No
+ELC         No
+DTC         No
+DMAC        No
+GPT         No
+AGT         No
+RTC         No
+WDT         No
+IWDT        No
+SCI         Yes       Just UART
+IIC         No
+SPI         No
+SSIE        No
+QSPI        No
+SDHI        No
+CAN         No
+USBFS       No
+ADC14       No
+DAC12       No
+DAC8        No
+ACMPLP      No
+OPAMP       No
+TSN         No
+SLCDC       No
+CTSU        No
+CRC         No
+DOC         No
+GPIO        Yes
+==========  =======  =====================================
+
+SCI
+----
+
+The Serial Communications Interface (SCI) is configurable to support several serial communication modes: Asynchronous (UART), Clock synchronous, Simple SPI
+Smart card interface, Simple IIC (master-only).
+Nuttx driver support UART mode (No-FIFO).
+
+GPIO
+-----
+
+
+
+Pins can be configured/operated using ``ra_gpio_*`` functions.
+
+Supported Boards
+================
+
+.. toctree::
+   :glob:
+   :maxdepth: 1
+
+   boards/*/*
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
@@ -361,6 +361,11 @@ config ARCH_CHIP_MCX_NXXX
 	select ARCH_HAVE_DFPU
 	---help---
 		NXXx architectures (Cortex-M33)
+
+config ARCH_CHIP_RA4
+	bool "Renesas RA4"
+	---help---
+		Renesas RA4 Architecture (ARM Cortex-M4F/M33).
 
 config ARCH_CHIP_RP2040
 	bool "Raspberry Pi RP2040"
@@ -1163,6 +1168,7 @@ config ARCH_CHIP
 	default "nrf53"		if ARCH_CHIP_NRF53
 	default "nrf91"		if ARCH_CHIP_NRF91
 	default "nuc1xx"	if ARCH_CHIP_NUC1XX
+	default "ra4"			if ARCH_CHIP_RA4
 	default "rp2040"	if ARCH_CHIP_RP2040
 	default "rp23xx"	if ARCH_CHIP_RP23XX
 	default "s32k1xx"	if ARCH_CHIP_S32K1XX
@@ -1625,6 +1631,9 @@ endif
 if ARCH_CHIP_NUC1XX
 source "arch/arm/src/nuc1xx/Kconfig"
 endif
+if ARCH_CHIP_RA4
+source "arch/arm/src/ra4/Kconfig"
+endif
 if ARCH_CHIP_RP2040
 source "arch/arm/src/rp2040/Kconfig"
 endif

diff --git a/arch/arm/include/ra4/chip.h b/arch/arm/include/ra4/chip.h
@@ -0,0 +1,87 @@
+/****************************************************************************
+ * arch/arm/include/ra4/chip.h
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_ARM_INCLUDE_RA_CHIP_H
+#define __ARCH_ARM_INCLUDE_RA_CHIP_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+/****************************************************************************
+ * Pre-processor Prototypes
+ ****************************************************************************/
+
+/* Get customizations for each supported chip */
+
+/* RA Family */
+
+/* Common FEATURES
+ * Flash        256KB
+ * DataFlash    8KB
+ * SRAM         32+16KB
+ */
+
+/* Internal memory */
+
+#  define RA_FLASH_SIZE            (256*1024)   /* 256KB */
+#  define RA_SRAM0_SIZE            (48*1024)    /* 48KB */
+
+/* FEATURE      R7FA4M1ABxxFP  R7FA4M1ABxxLJ  R7FA4M1ABxxFM R7FA4M1ABxxNB
+ * -----------  -------------  -------------  ------------- -------------
+ * Package      LQFP100        LGA100         LQFP64        QFNP64
+ * No. PIOs     81             81             49            49
+ * SCI          4              4              4             4
+ *
+ * FEATURE      R7FA4M1ABxxFL R7FA4M1ABxxNE R7FA4M1ABxxNF
+ * -----------  ------------- ------------- -------------
+ * Package      LQFP48        QFNP48        QFN40
+ * No. PIOs     33            33            25
+ * SCI          4             4             4
+ */
+
+/* NVIC priority levels *****************************************************/
+
+/* Each priority field holds a priority value, 0-15. The lower the value, the
+ * greater the priority of the corresponding interrupt. The processor
+ * implements only bits[7:4] of each field, bits[3:0] read as zero and ignore
+ * writes.
+ */
+
+#define NVIC_SYSH_PRIORITY_MIN        0xf0 /* All bits[7:4] set is minimum priority */
+#define NVIC_SYSH_PRIORITY_DEFAULT    0x80 /* Midpoint is the default */
+#define NVIC_SYSH_PRIORITY_MAX        0x00 /* Zero is maximum priority */
+#define NVIC_SYSH_PRIORITY_STEP       0x10 /* Four bits of interrupt priority used */
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Functions Prototypes
+ ****************************************************************************/
+
+#endif /* __ARCH_ARM_INCLUDE_RA_CHIP_H */