Welcome to Nafarr, an open-source library of IP cores designed to simplify the development of digital systems. Nafarr offers a versatile collection of high-quality, reusable peripheral and system components, making it easier for engineers and developers to create robust hardware designs.
Built using SpinalHDL 💻, a powerful hardware description language, Nafarr ensures flexibility and efficiency in design. The library also supports export to Verilog and VHDL 🔄, allowing seamless integration with a wide range of existing workflows and tools.
- 📦 Comprehensive Library: A wide array of IP cores for peripherals, system components, and more.
- ⚙️ SpinalHDL Powered: Take advantage of the expressiveness and efficiency of SpinalHDL for hardware design.
- 🔄 Multi-Format Support: Easily export your designs to Verilog or VHDL for compatibility with existing ecosystems.
- 🌐 Open-Source & Free: Completely free to use, modify, and distribute under an open-source license.
- 🔧 Community-Driven: Actively maintained and improved by a passionate community of developers.
Whether you're building complex systems-on-chip (SoCs), designing custom peripherals, or experimenting with new hardware architectures, Nafarr provides the building blocks you need. Best of all, it's completely free to use and actively maintained by a community of passionate developers.
Get started today and unlock the full potential of your hardware designs with Nafarr! 🛠️
The official Documentation is available here. Additionally, there are mentionworth chapters:
- Read more about this project.
- Start with the Getting Started guide.
- Learn how to export to Verilog or VHDL
- See the documenation for all IP cores.
Copyright (c) 2024 aesc silicon. Released under the MIT license.