gowin: Himbaechel. Initial BSRAM support #1225
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Only pROM/pROMX9 for now Signed-off-by: YRabbit <[email protected]>
The following primitives are implemented for the GW1NZ-1 chip: * pROM - read only memory - (bitwidth: 1, 2, 4, 8, 16, 32). * pROMX9 - read only memory - (bitwidth: 9, 18, 36). * SDPB - semidual port - (bitwidth: 1, 2, 4, 8, 16, 32). * SDPX9B - semidual port - (bitwidth: 9, 18, 36). * DPB - dual port - (bitwidth: 16). * DPX9B - dual port - (bitwidth: 18). * SP - single port - (bitwidth: 1, 2, 4, 8, 16, 32). * SPX9 - single port - (bitwidth: 9, 18, 36). Also: - The creation of databases for GW1NS-2 has been removed - this was not planned to be supported in Himbaechel from the very beginning and even examples were not created in apicula for this chip due to the lack of boards with it on sale. - It is temporarily prohibited to connect DFFs and LUTs into clusters because for some reason this prevents the creation of images on lower chips (placer cannot find the placement), although without these clusters the images are quite working. Requires further research. - Added creation of ALU with mode 0 - addition. Such an element is not generated by Yosys, but it is a favorite vendor element and its support here greatly simplifies the compilation of vendor netlists. Signed-off-by: YRabbit <[email protected]>
The following primitives are implemented for the GW1N-1, GW2A-18,
GW2AR-18C, GW1NSR-4C, GW1NR-9C, GW1NR-9 and GW1N-4 chips:
* pROM - read only memory - (bitwidth: 1, 2, 4, 8, 16, 32).
* pROMX9 - read only memory - (bitwidth: 9, 18, 36).
* SDPB - semidual port - (bitwidth: 1, 2, 4, 8, 16, 32).
* SDPX9B - semidual port - (bitwidth: 9, 18, 36).
* DPB - dual port - (bitwidth: 16).
* DPX9B - dual port - (bitwidth: 18).
* SP - single port - (bitwidth: 1, 2, 4, 8, 16, 32).
* SPX9 - single port - (bitwidth: 9, 18, 36).
For GW1NSR-4C and GW1NR-9 chips, SP/SPX9 primitives with data widths
of 32/36 bits are implemented using a pair of 16-bit wide
primitives.
Signed-off-by: YRabbit <[email protected]>
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Compatible with older apicula bases that don't know anything about BSRAM. |
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Only pROM/pROMX9 for now