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awooter: refactor router
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I was possessed by abstraction demons, I swear.
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Ravenslofty committed Dec 6, 2023
1 parent 70d76f5 commit c102ce6
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Showing 3 changed files with 251 additions and 417 deletions.
22 changes: 12 additions & 10 deletions common/route/awooter/rust/src/lib.rs
Original file line number Diff line number Diff line change
Expand Up @@ -60,10 +60,9 @@ fn extract_arcs_from_nets(ctx: &npnr::Context, nets: &npnr::Nets) -> Vec<route::
for sink_wire in ctx.sink_wires(net, *sink_ref) {
arcs.push(route::Arc::new(
source_wire,
source,
sink_wire,
sink,
net.index(),
nets.name_from_index(net.index()),
));

if verbose {
Expand Down Expand Up @@ -179,8 +178,8 @@ fn route(ctx: &mut npnr::Context, pressure: f32, history: f32) -> bool {
let mut special_arcs = vec![];
let mut partitionable_arcs = Vec::with_capacity(arcs.len());
for arc in arcs {
let src_name = ctx.name_of_wire(arc.get_source_wire()).to_str().unwrap();
let dst_name = ctx.name_of_wire(arc.get_sink_wire()).to_str().unwrap();
let src_name = ctx.name_of_wire(arc.source_wire()).to_str().unwrap();
let dst_name = ctx.name_of_wire(arc.sink_wire()).to_str().unwrap();

if src_name.contains("FCO_SLICE")
|| src_name.contains('J')
Expand Down Expand Up @@ -250,21 +249,24 @@ fn route(ctx: &mut npnr::Context, pressure: f32, history: f32) -> bool {
),
];

let mut router = route::Router::new(&nets, wires, pressure, history);
partitions
.par_iter()
.for_each(|(box_ne, box_sw, arcs, id)| {
let mut router = route::Router::new(*box_ne, *box_sw, pressure, history);
router.route(ctx, &nets, wires, arcs, &progress, id);
let thread = route::RouterThread::new(*box_ne, *box_sw, arcs, id, &progress);
router.route(ctx, &nets, &thread);
});

log_info!("Routing miscellaneous arcs\n");
let mut router = route::Router::new(
let thread = route::RouterThread::new(
Coord::new(0, 0),
Coord::new(ctx.grid_dim_x(), ctx.grid_dim_y()),
pressure,
history,
&special_arcs,
"MISC",
&progress,
);
router.route(ctx, &nets, wires, &special_arcs, &progress, "MISC");

router.route(ctx, &nets, &thread);

let time = format!("{:.2}", (Instant::now() - start).as_secs_f32());
log_info!("Routing took {}s\n", time.bold());
Expand Down
17 changes: 8 additions & 9 deletions common/route/awooter/rust/src/partition.rs
Original file line number Diff line number Diff line change
@@ -1,7 +1,6 @@
use std::{
cmp::Ordering,
collections::HashMap,
ops::RangeBounds,
sync::{atomic::AtomicUsize, Mutex, RwLock},
};

Expand Down Expand Up @@ -299,11 +298,11 @@ fn partition(
.into_par_iter()
.progress_with(progress)
.flat_map(|arc| {
let source_loc = arc.get_source_loc();
let source_loc = arc.source_loc();
let source_coords: Coord = source_loc.into();
let source_is_north = source_coords.is_north_of(&partition_coords);
let source_is_east = source_coords.is_east_of(&partition_coords);
let sink_loc = arc.get_sink_loc();
let sink_loc = arc.sink_loc();
let sink_coords: Coord = sink_loc.into();
let sink_is_north = sink_coords.is_north_of(&partition_coords);
let sink_is_east = sink_coords.is_east_of(&partition_coords);
Expand Down Expand Up @@ -338,8 +337,8 @@ fn partition(
if verbose {
log_info!(
"split arc {} to {} vertically across pip {}\n",
ctx.name_of_wire(arc.get_source_wire()).to_str().unwrap(),
ctx.name_of_wire(arc.get_sink_wire()).to_str().unwrap(),
ctx.name_of_wire(arc.source_wire()).to_str().unwrap(),
ctx.name_of_wire(arc.sink_wire()).to_str().unwrap(),
ctx.name_of_pip(selected_pip).to_str().unwrap()
);
}
Expand Down Expand Up @@ -382,8 +381,8 @@ fn partition(
if verbose {
log_info!(
"split arc {} to {} horizontally across pip {}\n",
ctx.name_of_wire(arc.get_source_wire()).to_str().unwrap(),
ctx.name_of_wire(arc.get_sink_wire()).to_str().unwrap(),
ctx.name_of_wire(arc.source_wire()).to_str().unwrap(),
ctx.name_of_wire(arc.sink_wire()).to_str().unwrap(),
ctx.name_of_pip(selected_pip).to_str().unwrap()
);
}
Expand Down Expand Up @@ -469,8 +468,8 @@ fn partition(
if verbose {
log_info!(
"split arc {} to {} across pips {} and {}\n",
ctx.name_of_wire(arc.get_source_wire()).to_str().unwrap(),
ctx.name_of_wire(arc.get_sink_wire()).to_str().unwrap(),
ctx.name_of_wire(arc.source_wire()).to_str().unwrap(),
ctx.name_of_wire(arc.sink_wire()).to_str().unwrap(),
ctx.name_of_pip(horiz_pip).to_str().unwrap(),
ctx.name_of_pip(vert_pip).to_str().unwrap()
);
Expand Down
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