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Preusser/mvu harden #1271

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Preusser/mvu harden #1271

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This PR improves the usability and timing closure of the DSP-based dot-product kernels by:

  • Pipelining the terminal reduction trees across parallel partial accumulations,
  • Allowing to trade the available bit allocation space between weights and activations,
  • Avoiding assign statements for the clock selection with difficult simulation scheduling semantics,
  • Allowing very wide accumulations even spilling the high lane out of the DSP datapath, and
  • Having the core DSP pipeline run freely without a high-fanout enable signal using zero-product insertion instead.

@preusser preusser requested review from auphelia and d-kor January 31, 2025 14:05
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