feat: update project tt_um_rebeccargb_hardware_utf8 from RebeccaRGB/h…

…ardware-utf8

Commit: 07f7e13ad2d10cb3e7321bd6ed81462241c04739
Workflow: https://github.com/RebeccaRGB/hardware-utf8/actions/runs/11356468579

projects/tt_um_rebeccargb_hardware_utf8/commit_id.json

@@ -1,8 +1,8 @@
 {
   "app": "Tiny Tapeout tt08 b85e49a2",
   "repo": "https://github.com/RebeccaRGB/hardware-utf8",
-  "commit": "2652cdd641193fee7df4ca60c9747c8ddd370876",
-  "workflow_url": "https://github.com/RebeccaRGB/hardware-utf8/actions/runs/11334572901",
+  "commit": "07f7e13ad2d10cb3e7321bd6ed81462241c04739",
+  "workflow_url": "https://github.com/RebeccaRGB/hardware-utf8/actions/runs/11356468579",
   "sort_id": 1729020018291,
   "openlane_version": "OpenLane2 2.0.8",
   "pdk_version": "open_pdks bdc9412b3e468c102d01b7cf6337be06ec6e9c9a"

projects/tt_um_rebeccargb_hardware_utf8/stats/metrics.csv

@@ -3,81 +3,81 @@ design__lint_error__count,0
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-design__max_fanout_violation__count__corner:nom_tt_025C_1v80,3
+design__max_fanout_violation__count__corner:nom_tt_025C_1v80,4
 design__max_cap_violation__count__corner:nom_tt_025C_1v80,0
-power__internal__total,0.0002959754492621869
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-power__leakage__total,9.833714287310613e-09
-power__total,0.0005824167747050524
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-timing__setup__ws__corner:nom_tt_025C_1v80,10.390574
+power__internal__total,0.000304048036923632
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-design__max_slew_violation__count,41
-design__max_fanout_violation__count,3
+design__max_slew_violation__count,21
+design__max_fanout_violation__count,4
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-clock__skew__worst_hold,0.024163
-clock__skew__worst_setup,0.011421
-timing__hold__ws,0.126364
-timing__setup__ws,6.426011
+clock__skew__worst_hold,0.015604
+clock__skew__worst_setup,-0.007314
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 timing__hold__tns,0.0
 timing__setup__tns,0.0
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 timing__hold_r2r_vio__count,0
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-timing__setup_r2r__ws,8.600002
+timing__setup_r2r__ws,7.472608
 timing__setup_r2r_vio__count,0
 design__die__bbox,0.0 0.0 161.0 111.52
 design__core__bbox,2.76 2.72 158.24 108.8
@@ -86,12 +86,12 @@ flow__errors__count,0
 design__io,45
 design__die__area,17954.7
 design__core__area,16493.3
-design__instance__count__stdcell,1217
-design__instance__area__stdcell,8828.47
+design__instance__count__stdcell,1221
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 design__instance__count__macros,0
 design__instance__area__macros,0
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-design__instance__utilization__stdcell,0.535275
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 design__power_grid_violation__count__net:VGND,0
 design__power_grid_violation__count__net:VPWR,0
 design__power_grid_violation__count,0
@@ -100,155 +100,147 @@ timing__drv__floating__pins,0
 design__instance__displacement__total,0
 design__instance__displacement__mean,0
 design__instance__displacement__max,0
-route__wirelength__estimated,31588.3
+route__wirelength__estimated,29638.3
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-route__net,1011
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-clock__skew__worst_hold__corner:max_ff_n40C_1v95,0.014816
-clock__skew__worst_setup__corner:max_ff_n40C_1v95,0.014816
-timing__hold__ws__corner:max_ff_n40C_1v95,0.130538
-timing__setup__ws__corner:max_ff_n40C_1v95,10.954401
+clock__skew__worst_hold__corner:max_ff_n40C_1v95,0.009646
+clock__skew__worst_setup__corner:max_ff_n40C_1v95,0.009646
+timing__hold__ws__corner:max_ff_n40C_1v95,0.125561
+timing__setup__ws__corner:max_ff_n40C_1v95,11.068863
 timing__hold__tns__corner:max_ff_n40C_1v95,0.0
 timing__setup__tns__corner:max_ff_n40C_1v95,0.0
 timing__hold__wns__corner:max_ff_n40C_1v95,0.0
 timing__setup__wns__corner:max_ff_n40C_1v95,0.0
 timing__hold_vio__count__corner:max_ff_n40C_1v95,0
-timing__hold_r2r__ws__corner:max_ff_n40C_1v95,0.130538
+timing__hold_r2r__ws__corner:max_ff_n40C_1v95,0.125561
 timing__hold_r2r_vio__count__corner:max_ff_n40C_1v95,0
 timing__setup_vio__count__corner:max_ff_n40C_1v95,0
 timing__setup_r2r__ws__corner:max_ff_n40C_1v95,inf
@@ -259,13 +251,13 @@ timing__unannotated_net__count,1
 timing__unannotated_net_filtered__count,0
 design_powergrid__voltage__worst__net:VPWR__corner:nom_tt_025C_1v80,1.79995
 design_powergrid__drop__average__net:VPWR__corner:nom_tt_025C_1v80,1.79999
-design_powergrid__drop__worst__net:VPWR__corner:nom_tt_025C_1v80,0.000053778
-design_powergrid__voltage__worst__net:VGND__corner:nom_tt_025C_1v80,0.0000541948
-design_powergrid__drop__average__net:VGND__corner:nom_tt_025C_1v80,0.0000100597
-design_powergrid__drop__worst__net:VGND__corner:nom_tt_025C_1v80,0.0000541948
+design_powergrid__drop__worst__net:VPWR__corner:nom_tt_025C_1v80,0.0000520348
+design_powergrid__voltage__worst__net:VGND__corner:nom_tt_025C_1v80,0.0000483616
+design_powergrid__drop__average__net:VGND__corner:nom_tt_025C_1v80,0.0000100264
+design_powergrid__drop__worst__net:VGND__corner:nom_tt_025C_1v80,0.0000483616
 ir__voltage__worst,1.8000000000000000444089209850062616169452667236328125
-ir__drop__avg,0.000010400000000000000376413310243517429398707463406026363372802734375
-ir__drop__worst,0.0000537999999999999998947890211820066497239167802035808563232421875
+ir__drop__avg,0.00001069999999999999919816744131662034078544820658862590789794921875
+ir__drop__worst,0.0000519999999999999967998688676917851125836023129522800445556640625
 magic__drc_error__count,0
 magic__illegal_overlap__count,0
 design__lvs_device_difference__count,0