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feat: update project tt_um_tommythorn_maxbw from tommythorn/tt08-maxbw
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Commit: 6c9586f96cb07f6ae94397d1c10b6bb6cd6f6cce
Workflow: https://github.com/tommythorn/tt08-maxbw/actions/runs/10697216217
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TinyTapeoutBot authored and urish committed Sep 4, 2024
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6 changes: 3 additions & 3 deletions projects/tt_um_tommythorn_maxbw/commit_id.json
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{
"app": "Tiny Tapeout tt08 3c88e6eb",
"app": "Tiny Tapeout tt08 587b6cb0",
"repo": "https://github.com/tommythorn/tt08-maxbw",
"commit": "62baa1e32812e7815b5009ffdd75eab8f0f461a7",
"workflow_url": "https://github.com/tommythorn/tt08-maxbw/actions/runs/10135974610",
"commit": "6c9586f96cb07f6ae94397d1c10b6bb6cd6f6cce",
"workflow_url": "https://github.com/tommythorn/tt08-maxbw/actions/runs/10697216217",
"sort_id": 1718604609464,
"openlane_version": "OpenLane2 2.0.8",
"pdk_version": "open_pdks bdc9412b3e468c102d01b7cf6337be06ec6e9c9a"
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16 changes: 7 additions & 9 deletions projects/tt_um_tommythorn_maxbw/docs/info.md
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<!---
This file is used to generate your project datasheet. Please fill in
the information below and delete any unused sections.
You can also include images in this folder and reference them in the
markdown. Each image must be less than 512 kb in size, and the
combined size of all images must be less than 1 MB.
This file is used to generate your project datasheet. Please fill in the information below and delete any unused
sections.
You can also include images in this folder and reference them in the markdown. Each image must be less than
512 kb in size, and the combined size of all images must be less than 1 MB.
-->

## How it works

(please refer to the README.md for now)
This project does work

## How to test

Drive it with a very dedicated test bench.
This project can't be tested

## External hardware

A suitable uncore, like the RP2040 running the corresponding firmware.
No hardware needed
68 changes: 39 additions & 29 deletions projects/tt_um_tommythorn_maxbw/info.yaml
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# Tiny Tapeout project information
project:
title: "MaxBW interconnect"
title: "Experiments"
author: "Tommy Thorn"
discord: "tommythorn"
description: "A testbench and proof of concept of the MaxBW core-uncore interconnection"
description: "A 32-bit multiplier"
language: "Verilog"
clock_hz: 66000000
tiles: "1x1" # Valid values: 1x1, 1x2, 2x2, 3x2, 4x2, 6x2 or 8x2
top_module: "tt_um_tommythorn_maxbw"
clock_hz: 100 # Clock frequency in Hz (or 0 if not applicable)

# How many tiles your design occupies? A single tile is about 167x108 uM.
tiles: "1x1" # Valid values: 1x1, 1x2, 2x2, 3x2, 4x2, 6x2 or 8x2

# Your top module name must start with "tt_um_". Make it unique by including your github username:
top_module: "tt_um_tommythorn_maxbw"

# List your project's source files here.
# Source files must be in ./src and you must list each source file separately, one per line.
# Don't forget to also update `PROJECT_SOURCES` in test/Makefile.
source_files:
- "project.v"
- "tokenflow.v"

# The pinout of your project. Leave unused pins blank. DO NOT delete or add any pins.
pinout:
# Inputs
ui[0]: "ingress0"
ui[1]: "ingress1"
ui[2]: "ingress2"
ui[3]: "ingress3"
ui[4]: "ingress4"
ui[5]: "ingress5"
ui[6]: "ingress6"
ui[7]: "ingress7"
ui[0]: ""
ui[1]: ""
ui[2]: ""
ui[3]: ""
ui[4]: ""
ui[5]: ""
ui[6]: ""
ui[7]: ""

# Outputs
uo[0]: "egress0"
uo[1]: "egress1"
uo[2]: "egress2"
uo[3]: "egress3"
uo[4]: "egress4"
uo[5]: "egress5"
uo[6]: "egress6"
uo[7]: "egress7"
uo[0]: "product_24"
uo[1]: "product_25"
uo[2]: "product_26"
uo[3]: "product_27"
uo[4]: "product_28"
uo[5]: "product_29"
uo[6]: "product_30"
uo[7]: "product_31"

# Bidirectional pins
uio[0]: "ingress8"
uio[1]: "ingress9"
uio[2]: "ingress10"
uio[3]: "ingress11"
uio[4]: "ingress12"
uio[5]: "ingress13"
uio[6]: "ingress14"
uio[7]: "ingress15"
uio[0]: "product_16"
uio[1]: "product_17"
uio[2]: "product_18"
uio[3]: "product_19"
uio[4]: "product_20"
uio[5]: "product_21"
uio[6]: "product_22"
uio[7]: "product_23"

# Do not change!
yaml_version: 6
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