Adamg/dmauarttest

AvionicsSoftware.ioc

@@ -9,7 +9,7 @@ ADC1.SamplingTime-0\#ChannelRegularConversion=ADC_SAMPLETIME_28CYCLES
 ADC1.ScanConvMode=DISABLE
 ADC1.master=1
 ADC2.Channel-68\#ChannelRegularConversion=ADC_CHANNEL_10
-ADC2.ClockPrescaler=ADC_CLOCK_SYNC_PCLK_DIV2
+ADC2.ClockPrescaler=ADC_CLOCK_SYNC_PCLK_DIV4
 ADC2.ContinuousConvMode=ENABLE
 ADC2.DMAContinuousRequests=DISABLE
 ADC2.DataAlign=ADC_DATAALIGN_RIGHT
@@ -30,7 +30,9 @@ CAD.formats=
 CAD.pinconfig=
 CAD.provider=
 Dma.Request0=UART4_RX
-Dma.RequestsNb=1
+Dma.Request1=UART5_RX
+Dma.Request2=UART5_TX
+Dma.RequestsNb=3
 Dma.UART4_RX.0.Direction=DMA_PERIPH_TO_MEMORY
 Dma.UART4_RX.0.FIFOMode=DMA_FIFOMODE_DISABLE
 Dma.UART4_RX.0.Instance=DMA1_Stream2
@@ -41,6 +43,26 @@ Dma.UART4_RX.0.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
 Dma.UART4_RX.0.PeriphInc=DMA_PINC_DISABLE
 Dma.UART4_RX.0.Priority=DMA_PRIORITY_LOW
 Dma.UART4_RX.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
+Dma.UART5_RX.1.Direction=DMA_PERIPH_TO_MEMORY
+Dma.UART5_RX.1.FIFOMode=DMA_FIFOMODE_DISABLE
+Dma.UART5_RX.1.Instance=DMA1_Stream0
+Dma.UART5_RX.1.MemDataAlignment=DMA_MDATAALIGN_BYTE
+Dma.UART5_RX.1.MemInc=DMA_MINC_ENABLE
+Dma.UART5_RX.1.Mode=DMA_NORMAL
+Dma.UART5_RX.1.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
+Dma.UART5_RX.1.PeriphInc=DMA_PINC_DISABLE
+Dma.UART5_RX.1.Priority=DMA_PRIORITY_LOW
+Dma.UART5_RX.1.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
+Dma.UART5_TX.2.Direction=DMA_MEMORY_TO_PERIPH
+Dma.UART5_TX.2.FIFOMode=DMA_FIFOMODE_DISABLE
+Dma.UART5_TX.2.Instance=DMA1_Stream7
+Dma.UART5_TX.2.MemDataAlignment=DMA_MDATAALIGN_BYTE
+Dma.UART5_TX.2.MemInc=DMA_MINC_ENABLE
+Dma.UART5_TX.2.Mode=DMA_NORMAL
+Dma.UART5_TX.2.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
+Dma.UART5_TX.2.PeriphInc=DMA_PINC_DISABLE
+Dma.UART5_TX.2.Priority=DMA_PRIORITY_LOW
+Dma.UART5_TX.2.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
 FREERTOS.FootprintOK=true
 FREERTOS.INCLUDE_vTaskDelayUntil=1
 FREERTOS.IPParameters=Tasks01,INCLUDE_vTaskDelayUntil,FootprintOK,configMAX_TASK_NAME_LEN,configUSE_NEWLIB_REENTRANT,configTOTAL_HEAP_SIZE,configUSE_TIMERS
@@ -125,10 +147,12 @@ Mcu.PinsNb=47
 Mcu.ThirdPartyNb=0
 Mcu.UserConstants=
 Mcu.UserName=STM32F405RGTx
-MxCube.Version=6.7.0
-MxDb.Version=DB.6.0.70
+MxCube.Version=6.10.0
+MxDb.Version=DB.6.0.100
 NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
+NVIC.DMA1_Stream0_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
 NVIC.DMA1_Stream2_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
+NVIC.DMA1_Stream7_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
 NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
 NVIC.ForceEnableDMAVector=true
 NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
@@ -351,10 +375,13 @@ ProjectManager.PreviousToolchain=STM32CubeIDE
 ProjectManager.ProjectBuild=false
 ProjectManager.ProjectFileName=AvionicsSoftware.ioc
 ProjectManager.ProjectName=AvionicsSoftware
+ProjectManager.ProjectStructure=
 ProjectManager.RegisterCallBack=
 ProjectManager.StackSize=0x400
 ProjectManager.TargetToolchain=STM32CubeIDE
 ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
 ProjectManager.UnderRoot=true
 ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-true,3-MX_DMA_Init-DMA-false-HAL-true,4-MX_SPI1_Init-SPI1-false-HAL-true,5-MX_USART2_UART_Init-USART2-false-LL-true,6-MX_UART4_Init-UART4-false-HAL-true,7-MX_CRC_Init-CRC-false-HAL-true,8-MX_SPI3_Init-SPI3-false-HAL-true,9-MX_UART5_Init-UART5-false-LL-true,10-MX_ADC2_Init-ADC2-false-HAL-true,11-MX_SPI2_Init-SPI2-false-HAL-true,12-MX_TIM2_Init-TIM2-false-HAL-true,13-MX_USART1_UART_Init-USART1-false-LL-true,14-MX_USART3_UART_Init-USART3-false-LL-true,15-MX_ADC1_Init-ADC1-false-HAL-true
 RCC.48MHZClocksFreq_Value=84000000
@@ -445,4 +472,5 @@ VP_SYS_VS_tim1.Signal=SYS_VS_tim1
 VP_TIM2_VS_ClockSourceINT.Mode=Internal
 VP_TIM2_VS_ClockSourceINT.Signal=TIM2_VS_ClockSourceINT
 board=VanderAvionics
+rtos.0.ip=FREERTOS
 isbadioc=false

Components/Communication/Inc/UARTDriver.hpp

@@ -14,6 +14,10 @@
 #include "stm32f4xx_ll_dma.h"
 #include "cmsis_os.h"
 
+/* Macros ----------------------------------------------------------------*/
+constexpr uint16_t DEBUG_DMA_RX_BUF_SIZE = 64;
+constexpr uint16_t DEBUG_DMA_TX_BUF_SIZE = 64;
+
 /* UART Driver Instances ------------------------------------------------------------------*/
 class UARTDriver;
 
@@ -57,14 +61,17 @@ class UARTDriver
 	UARTDriver(USART_TypeDef* uartInstance) :
 		kUart_(uartInstance),
 		rxCharBuf_(nullptr),
-		rxReceiver_(nullptr) {}
+		rxReceiver_(nullptr),
+		transmittingDMA(false) {}
 
 	// Polling Functions
 	bool Transmit(uint8_t* data, uint16_t len);
 
 	// Interrupt Functions
 	bool ReceiveIT(uint8_t* charBuf, UARTReceiverBase* receiver);
 
+	// yeah ok
+	void FinishDMA();
 
 	// Interrupt Handlers
 	void HandleIRQ_UART(); // This MUST be called inside USARTx_IRQHandler
@@ -81,6 +88,8 @@ class UARTDriver
 	// Variables
 	uint8_t* rxCharBuf_; // Stores a pointer to the buffer to store the received data
 	UARTReceiverBase* rxReceiver_; // Stores a pointer to the receiver object
+
+	bool transmittingDMA;
 };
 
 

Components/Communication/Inc/UARTTask.hpp

@@ -42,6 +42,9 @@ class UARTTask : public Task
     void ConfigureUART();
     void HandleCommand(Command& cm);
 
+    uint8_t *DMABUF;
+    uint8_t *TXBUF;
+
 private:
     UARTTask() : Task(UART_TASK_QUEUE_DEPTH_OBJS) {}    // Private constructor
     UARTTask(const UARTTask&);                        // Prevent copy-construction

Components/Communication/UARTDriver.cpp

@@ -14,6 +14,8 @@
 */
 #include "UARTDriver.hpp"
 #include "main_avionics.hpp"
+#include "DebugTask.hpp"
+#include <string.h>
 
 // Declare the global UART driver objects
 namespace Driver {
@@ -31,6 +33,21 @@ namespace Driver {
  */
 bool UARTDriver::Transmit(uint8_t* data, uint16_t len)
 {
+	if(this == &Driver::uart5) {
+
+		while(transmittingDMA) {};
+
+		transmittingDMA = true;
+
+		LL_DMA_SetDataLength(DMA1, LL_DMA_STREAM_7, len);
+
+		memcpy((uint8_t*)LL_DMA_GetMemoryAddress(DMA1, LL_DMA_STREAM_7),data,len);
+
+		LL_DMA_EnableStream(DMA1, LL_DMA_STREAM_7);
+
+		LL_DMA_SetCurrentTargetMem(DMA1, LL_DMA_STREAM_7, (uint32_t)LL_DMA_GetMemoryAddress(DMA1, LL_DMA_STREAM_7));
+
+	} else {
 	// Loop through and transmit each byte via. polling
 	for (uint16_t i = 0; i < len; i++) {
 		LL_USART_TransmitData8(kUart_, data[i]);
@@ -41,10 +58,21 @@ bool UARTDriver::Transmit(uint8_t* data, uint16_t len)
 
 	// Wait until the transfer complete flag is set
 	while (!LL_USART_IsActiveFlag_TC(kUart_)) {}
+	}
 
 	return true;
 }
 
+
+
+
+// yeah ok
+void UARTDriver::FinishDMA() {
+	transmittingDMA = false;
+}
+
+
+
 /**
 * @brief Receives 1 byte of data via interrupt
 * @param receiver
@@ -125,6 +153,21 @@ bool UARTDriver::GetRxErrors()
  */
 void UARTDriver::HandleIRQ_UART()
 {
+    void* d = (void *)1;
+
+// aehouhehahoeuhah
+    /* Check for IDLE line interrupt */
+
+    if(kUart_ == Driver::uart5.kUart_) {
+    	if (LL_USART_IsEnabledIT_IDLE(kUart_) && LL_USART_IsActiveFlag_IDLE(kUart_)) {
+    		LL_USART_ClearFlag_IDLE(kUart_);        /* Clear IDLE line flag */
+    		rxReceiver_->InterruptRxData(DEBUG_DMA_RX_BUF_SIZE-LL_DMA_GetDataLength(DMA1, LL_DMA_STREAM_0));
+
+
+    	}
+    } else {
+
+
 	// Call the callback if RXNE is set
 	if (LL_USART_IsActiveFlag_RXNE(kUart_)) {
 		// Read the data from the data register
@@ -137,4 +180,5 @@ void UARTDriver::HandleIRQ_UART()
 			rxReceiver_->InterruptRxData(GetRxErrors());
 		}
 	}
+    }
 }

Components/Communication/UARTTask.cpp

@@ -7,17 +7,79 @@
 
 #include "UARTTask.hpp"
 #include "UARTDriver.hpp"
+#include <cstring>
+#include "cmsis_os.h"
 
 /**
  * TODO: Currently not used, would be used for DMA buffer configuration or interrupt setup
  * @brief Configures UART DMA buffers and interrupts
  * 
 */
+
+
 void UARTTask::ConfigureUART()
 {
     // UART 5 - Uses polling for now (switch to DMA or interrupts once SOAR-Protocol is defined)
+	// DMA IS BEGINNING WOW!!!!!!!!!!!
+
+	LL_DMA_SetMemoryAddress(DMA1, LL_DMA_STREAM_0, (uint32_t)DMABUF);
+	LL_DMA_SetDataLength(DMA1, LL_DMA_STREAM_0, DEBUG_DMA_RX_BUF_SIZE);
+
+	LL_DMA_SetMemoryAddress(DMA1, LL_DMA_STREAM_7, (uint32_t)TXBUF);
+	LL_DMA_SetDataLength(DMA1, LL_DMA_STREAM_7, DEBUG_DMA_TX_BUF_SIZE);
+
+	  LL_DMA_EnableIT_HT(DMA1, LL_DMA_STREAM_0);
+	  LL_DMA_EnableIT_TC(DMA1, LL_DMA_STREAM_0);
+
+	  LL_DMA_EnableIT_HT(DMA1, LL_DMA_STREAM_7);
+	  LL_DMA_EnableIT_TC(DMA1, LL_DMA_STREAM_7);
+	 // HAL_UART_Receive_DMA(huart4, DMABUF, 40);
+
+
+//	  NVIC_SetPriority(DMA1_Stream0_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(), 5, 0));
+//	  NVIC_EnableIRQ(DMA1_Stream0_IRQn);
+
+
+	LL_USART_EnableIT_IDLE(UART5);
+
+
+
+	  LL_USART_EnableDMAReq_RX(UART5);
+	  LL_USART_EnableDMAReq_TX(UART5);
+
+
+	    LL_DMA_SetPeriphAddress(DMA1, LL_DMA_STREAM_0, LL_USART_DMA_GetRegAddr(UART5));
+	    LL_DMA_SetPeriphAddress(DMA1, LL_DMA_STREAM_7, LL_USART_DMA_GetRegAddr(UART5));
+
+
+
+	LL_DMA_EnableStream(DMA1, LL_DMA_STREAM_0);
+	LL_DMA_EnableStream(DMA1, LL_DMA_STREAM_7);
+
+
+	// WHY
+	LL_USART_ClearFlag_FE(UART5);
+	LL_USART_ClearFlag_IDLE(UART5);
+	LL_USART_ClearFlag_LBD(UART5);
+	LL_USART_ClearFlag_NE(UART5);
+	LL_USART_ClearFlag_ORE(UART5);
+	LL_USART_ClearFlag_PE(UART5);
+	LL_USART_ClearFlag_RXNE(UART5);
+	LL_USART_ClearFlag_TC(UART5);
+	LL_USART_ClearFlag_nCTS(UART5);
+
+	LL_DMA_ClearFlag_DME4(DMA1);
+	LL_DMA_ClearFlag_FE4(DMA1);
+	LL_DMA_ClearFlag_HT4(DMA1);
+	LL_DMA_ClearFlag_TC4(DMA1);
+	LL_DMA_ClearFlag_TE4(DMA1);
+
+
+
 }
 
+
+
 /**
  * @brief Initializes UART task with the RTOS scheduler
 */
@@ -26,6 +88,13 @@ void UARTTask::InitTask()
     // Make sure the task is not already initialized
     SOAR_ASSERT(rtTaskHandle == nullptr, "Cannot initialize UART task twice");
 
+    DMABUF = new uint8_t[DEBUG_DMA_RX_BUF_SIZE];
+    memset(DMABUF,0xab,DEBUG_DMA_RX_BUF_SIZE);
+
+    TXBUF = new uint8_t[DEBUG_DMA_TX_BUF_SIZE];
+    memset(TXBUF,0xbc,DEBUG_DMA_TX_BUF_SIZE);
+
+    strcpy((char*)TXBUF,"hello world");
     // Start the task
     BaseType_t rtValue =
         xTaskCreate((TaskFunction_t)UARTTask::RunTask,
@@ -39,6 +108,7 @@ void UARTTask::InitTask()
     SOAR_ASSERT(rtValue == pdPASS, "UARTTask::InitTask() - xTaskCreate() failed");
 
     // Configure DMA
+    ConfigureUART();
 
 }
 
@@ -57,6 +127,7 @@ void UARTTask::Run(void * pvParams)
 
         //Process the command
         HandleCommand(cm);
+
     }
 }
 

Components/Core/Inc/RunInterface.hpp

@@ -14,5 +14,6 @@ void cpp_USART1_IRQHandler();
 void cpp_USART2_IRQHandler();
 void cpp_USART3_IRQHandler();
 void cpp_USART5_IRQHandler();
+void cpp_DMA1_Stream0_IRQHandler();
 
 #endif /* C__IFACE_HPP_ */

Components/Core/RunInterface.cpp

@@ -33,6 +33,42 @@ extern "C" {
     {
         Driver::uart5.HandleIRQ_UART();
     }
+
+    void cpp_DMA1_Stream0_IRQHandler() {
+        /* Check half-transfer complete interrupt */
+        if (LL_DMA_IsEnabledIT_HT(DMA1, LL_DMA_STREAM_0) && LL_DMA_IsActiveFlag_HT0(DMA1)) {
+            LL_DMA_ClearFlag_HT0(DMA1);             /* Clear half-transfer complete flag */
+
+        }
+
+        /* Check transfer-complete interrupt */
+        if (LL_DMA_IsEnabledIT_TC(DMA1, LL_DMA_STREAM_0) && LL_DMA_IsActiveFlag_TC0(DMA1)) {
+            LL_DMA_ClearFlag_TC0(DMA1);             /* Clear transfer complete flag */
+
+        }
+        //SOAR_PRINT("PLEASE\n");
+
+    }
+
+    void cpp_DMA1_Stream7_IRQHandler() {
+        /* Check half-transfer complete interrupt */
+        if (LL_DMA_IsEnabledIT_HT(DMA1, LL_DMA_STREAM_7) && LL_DMA_IsActiveFlag_HT7(DMA1)) {
+            LL_DMA_ClearFlag_HT7(DMA1);             /* Clear half-transfer complete flag */
+
+        }
+
+        /* Check transfer-complete interrupt */
+        if (LL_DMA_IsEnabledIT_TC(DMA1, LL_DMA_STREAM_7) && LL_DMA_IsActiveFlag_TC7(DMA1)) {
+            LL_DMA_ClearFlag_TC7(DMA1);             /* Clear transfer complete flag */
+            Driver::uart5.FinishDMA();
+            LL_DMA_DisableStream(DMA1, LL_DMA_STREAM_7);
+
+        }
+
+
+        //SOAR_PRINT("PLEASE\n");
+
+    }
 }
 
 

Components/FlightControl/HDITask.cpp

@@ -52,7 +52,7 @@ etl::map<RocketState, HDIConfig, 11> stateBlinks = etl::map<RocketState, HDIConf
 /**
 * @brief Constructor for HDITask
 */
-HDITask::HDITask():Task(HDI_TASK_QUEUE_DEPTH_OBJS), buzzerMuted_(false)
+HDITask::HDITask():Task(HDI_TASK_QUEUE_DEPTH_OBJS), buzzerMuted_(true)
 {
 }