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Headers support for FPGAClusterAttributesV2INTEL #393

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merged 1 commit into from
Dec 6, 2023
Merged

Headers support for FPGAClusterAttributesV2INTEL #393

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2 changes: 2 additions & 0 deletions include/spirv/unified1/spirv.bf
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Original file line number Diff line number Diff line change
Expand Up @@ -603,6 +603,7 @@ namespace Spv
SingleElementVectorINTEL = 6085,
VectorComputeCallableFunctionINTEL = 6087,
MediaBlockIOINTEL = 6140,
StallFreeINTEL = 6151,
FPMaxErrorDecorationINTEL = 6170,
LatencyControlLabelINTEL = 6172,
LatencyControlConstraintINTEL = 6173,
Expand Down Expand Up @@ -1203,6 +1204,7 @@ namespace Spv
DebugInfoModuleINTEL = 6114,
BFloat16ConversionINTEL = 6115,
SplitBarrierINTEL = 6141,
FPGAClusterAttributesV2INTEL = 6150,
FPGAKernelAttributesv2INTEL = 6161,
FPMaxErrorINTEL = 6169,
FPGALatencyControlINTEL = 6171,
Expand Down
13 changes: 13 additions & 0 deletions include/spirv/unified1/spirv.core.grammar.json
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Expand Up @@ -13567,6 +13567,12 @@
"capabilities" : [ "VectorComputeINTEL" ],
"version" : "None"
},
{
"enumerant" : "StallFreeINTEL",
"value" : 6151,
"capabilities" : [ "FPGAClusterAttributesV2INTEL" ],
"version" : "None"
},
{
"enumerant" : "FPMaxErrorDecorationINTEL",
"value" : 6170,
Expand Down Expand Up @@ -16259,6 +16265,13 @@
"extensions" : [ "SPV_INTEL_split_barrier" ],
"version" : "None"
},
{
"enumerant" : "FPGAClusterAttributesV2INTEL",
"value" : 6150,
"capabilities" : [ "FPGAClusterAttributesINTEL" ],
"extensions" : [ "SPV_INTEL_fpga_cluster_attributes" ],
"version" : "None"
},
{
"enumerant" : "FPGAKernelAttributesv2INTEL",
"value" : 6161,
Expand Down
2 changes: 2 additions & 0 deletions include/spirv/unified1/spirv.cs
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Expand Up @@ -602,6 +602,7 @@ public enum Decoration
SingleElementVectorINTEL = 6085,
VectorComputeCallableFunctionINTEL = 6087,
MediaBlockIOINTEL = 6140,
StallFreeINTEL = 6151,
FPMaxErrorDecorationINTEL = 6170,
LatencyControlLabelINTEL = 6172,
LatencyControlConstraintINTEL = 6173,
Expand Down Expand Up @@ -1202,6 +1203,7 @@ public enum Capability
DebugInfoModuleINTEL = 6114,
BFloat16ConversionINTEL = 6115,
SplitBarrierINTEL = 6141,
FPGAClusterAttributesV2INTEL = 6150,
FPGAKernelAttributesv2INTEL = 6161,
FPMaxErrorINTEL = 6169,
FPGALatencyControlINTEL = 6171,
Expand Down
2 changes: 2 additions & 0 deletions include/spirv/unified1/spirv.h
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Expand Up @@ -608,6 +608,7 @@ typedef enum SpvDecoration_ {
SpvDecorationSingleElementVectorINTEL = 6085,
SpvDecorationVectorComputeCallableFunctionINTEL = 6087,
SpvDecorationMediaBlockIOINTEL = 6140,
SpvDecorationStallFreeINTEL = 6151,
SpvDecorationFPMaxErrorDecorationINTEL = 6170,
SpvDecorationLatencyControlLabelINTEL = 6172,
SpvDecorationLatencyControlConstraintINTEL = 6173,
Expand Down Expand Up @@ -1202,6 +1203,7 @@ typedef enum SpvCapability_ {
SpvCapabilityDebugInfoModuleINTEL = 6114,
SpvCapabilityBFloat16ConversionINTEL = 6115,
SpvCapabilitySplitBarrierINTEL = 6141,
SpvCapabilityFPGAClusterAttributesV2INTEL = 6150,
SpvCapabilityFPGAKernelAttributesv2INTEL = 6161,
SpvCapabilityFPMaxErrorINTEL = 6169,
SpvCapabilityFPGALatencyControlINTEL = 6171,
Expand Down
2 changes: 2 additions & 0 deletions include/spirv/unified1/spirv.hpp
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Expand Up @@ -604,6 +604,7 @@ enum Decoration {
DecorationSingleElementVectorINTEL = 6085,
DecorationVectorComputeCallableFunctionINTEL = 6087,
DecorationMediaBlockIOINTEL = 6140,
DecorationStallFreeINTEL = 6151,
DecorationFPMaxErrorDecorationINTEL = 6170,
DecorationLatencyControlLabelINTEL = 6172,
DecorationLatencyControlConstraintINTEL = 6173,
Expand Down Expand Up @@ -1198,6 +1199,7 @@ enum Capability {
CapabilityDebugInfoModuleINTEL = 6114,
CapabilityBFloat16ConversionINTEL = 6115,
CapabilitySplitBarrierINTEL = 6141,
CapabilityFPGAClusterAttributesV2INTEL = 6150,
CapabilityFPGAKernelAttributesv2INTEL = 6161,
CapabilityFPMaxErrorINTEL = 6169,
CapabilityFPGALatencyControlINTEL = 6171,
Expand Down
2 changes: 2 additions & 0 deletions include/spirv/unified1/spirv.hpp11
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Expand Up @@ -604,6 +604,7 @@ enum class Decoration : unsigned {
SingleElementVectorINTEL = 6085,
VectorComputeCallableFunctionINTEL = 6087,
MediaBlockIOINTEL = 6140,
StallFreeINTEL = 6151,
FPMaxErrorDecorationINTEL = 6170,
LatencyControlLabelINTEL = 6172,
LatencyControlConstraintINTEL = 6173,
Expand Down Expand Up @@ -1198,6 +1199,7 @@ enum class Capability : unsigned {
DebugInfoModuleINTEL = 6114,
BFloat16ConversionINTEL = 6115,
SplitBarrierINTEL = 6141,
FPGAClusterAttributesV2INTEL = 6150,
FPGAKernelAttributesv2INTEL = 6161,
FPMaxErrorINTEL = 6169,
FPGALatencyControlINTEL = 6171,
Expand Down
2 changes: 2 additions & 0 deletions include/spirv/unified1/spirv.json
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Original file line number Diff line number Diff line change
Expand Up @@ -630,6 +630,7 @@
"SingleElementVectorINTEL": 6085,
"VectorComputeCallableFunctionINTEL": 6087,
"MediaBlockIOINTEL": 6140,
"StallFreeINTEL": 6151,
"FPMaxErrorDecorationINTEL": 6170,
"LatencyControlLabelINTEL": 6172,
"LatencyControlConstraintINTEL": 6173,
Expand Down Expand Up @@ -1178,6 +1179,7 @@
"DebugInfoModuleINTEL": 6114,
"BFloat16ConversionINTEL": 6115,
"SplitBarrierINTEL": 6141,
"FPGAClusterAttributesV2INTEL": 6150,
"FPGAKernelAttributesv2INTEL": 6161,
"FPMaxErrorINTEL": 6169,
"FPGALatencyControlINTEL": 6171,
Expand Down
2 changes: 2 additions & 0 deletions include/spirv/unified1/spirv.lua
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Expand Up @@ -577,6 +577,7 @@ spv = {
SingleElementVectorINTEL = 6085,
VectorComputeCallableFunctionINTEL = 6087,
MediaBlockIOINTEL = 6140,
StallFreeINTEL = 6151,
FPMaxErrorDecorationINTEL = 6170,
LatencyControlLabelINTEL = 6172,
LatencyControlConstraintINTEL = 6173,
Expand Down Expand Up @@ -1160,6 +1161,7 @@ spv = {
DebugInfoModuleINTEL = 6114,
BFloat16ConversionINTEL = 6115,
SplitBarrierINTEL = 6141,
FPGAClusterAttributesV2INTEL = 6150,
FPGAKernelAttributesv2INTEL = 6161,
FPMaxErrorINTEL = 6169,
FPGALatencyControlINTEL = 6171,
Expand Down
2 changes: 2 additions & 0 deletions include/spirv/unified1/spirv.py
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Original file line number Diff line number Diff line change
Expand Up @@ -577,6 +577,7 @@
'SingleElementVectorINTEL' : 6085,
'VectorComputeCallableFunctionINTEL' : 6087,
'MediaBlockIOINTEL' : 6140,
'StallFreeINTEL' : 6151,
'FPMaxErrorDecorationINTEL' : 6170,
'LatencyControlLabelINTEL' : 6172,
'LatencyControlConstraintINTEL' : 6173,
Expand Down Expand Up @@ -1160,6 +1161,7 @@
'DebugInfoModuleINTEL' : 6114,
'BFloat16ConversionINTEL' : 6115,
'SplitBarrierINTEL' : 6141,
'FPGAClusterAttributesV2INTEL' : 6150,
'FPGAKernelAttributesv2INTEL' : 6161,
'FPMaxErrorINTEL' : 6169,
'FPGALatencyControlINTEL' : 6171,
Expand Down
2 changes: 2 additions & 0 deletions include/spirv/unified1/spv.d
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Original file line number Diff line number Diff line change
Expand Up @@ -605,6 +605,7 @@ enum Decoration : uint
SingleElementVectorINTEL = 6085,
VectorComputeCallableFunctionINTEL = 6087,
MediaBlockIOINTEL = 6140,
StallFreeINTEL = 6151,
FPMaxErrorDecorationINTEL = 6170,
LatencyControlLabelINTEL = 6172,
LatencyControlConstraintINTEL = 6173,
Expand Down Expand Up @@ -1205,6 +1206,7 @@ enum Capability : uint
DebugInfoModuleINTEL = 6114,
BFloat16ConversionINTEL = 6115,
SplitBarrierINTEL = 6141,
FPGAClusterAttributesV2INTEL = 6150,
FPGAKernelAttributesv2INTEL = 6161,
FPMaxErrorINTEL = 6169,
FPGALatencyControlINTEL = 6171,
Expand Down