amazon .3.2.4 compatible kernel

arch/arm/boot/dts/apollo.dtsi

@@ -22,6 +22,10 @@
 		status = "ok";
 	};
 
+        qcom,wdt@f9017000 {
+                qcom,bark-time = <12000>;
+        };
+
 	qcom,mdss_dsi_jdi_dualmipi0_video {
 		status = "ok";
 		qcom,cont-splash-enabled;

arch/arm/boot/dts/thor.dtsi

@@ -21,6 +21,10 @@
 		status = "ok";
 	};
 
+        qcom,wdt@f9017000 {
+                qcom,bark-time = <12000>;
+        };
+
 	qcom,mdss_dsi_novatek_1080p_video {
 		qcom,mdss-pan-dsi-dlane-swap = <1>;
 		status = "ok";

arch/arm/configs/apollo-perf_defconfig

@@ -66,16 +66,15 @@ CONFIG_MSM_ADSP_LOADER=m
 CONFIG_MSM_OCMEM=y
 CONFIG_MSM_OCMEM_LOCAL_POWER_CTRL=y
 CONFIG_MSM_OCMEM_DEBUG=y
-CONFIG_MSM_OCMEM_NONSECURE=y
 # CONFIG_MSM_RTB is not set
 # CONFIG_MSM_RTB_SEPARATE_CPUS is not set
 CONFIG_MSM_CACHE_ERP=y
 CONFIG_MSM_L1_ERR_PANIC=y
 CONFIG_MSM_L1_RECOV_ERR_PANIC=y
 CONFIG_MSM_L1_ERR_LOG=y
 CONFIG_MSM_L2_ERP_PRINT_ACCESS_ERRORS=y
-CONFIG_MSM_L2_ERP_PORT_PANIC=y
-CONFIG_MSM_L2_ERP_2BIT_PANIC=y
+#CONFIG_MSM_L2_ERP_PORT_PANIC=y
+#CONFIG_MSM_L2_ERP_2BIT_PANIC=y
 # CONFIG_MSM_CACHE_DUMP is not set
 # CONFIG_MSM_CACHE_DUMP_ON_PANIC is not set
 CONFIG_MSM_ENABLE_WDOG_DEBUG_CONTROL=y

arch/arm/configs/thor-perf_defconfig

@@ -67,16 +67,15 @@ CONFIG_MSM_ADSP_LOADER=m
 CONFIG_MSM_OCMEM=y
 CONFIG_MSM_OCMEM_LOCAL_POWER_CTRL=y
 CONFIG_MSM_OCMEM_DEBUG=y
-CONFIG_MSM_OCMEM_NONSECURE=y
 # CONFIG_MSM_RTB is not set
 # CONFIG_MSM_RTB_SEPARATE_CPUS is not set
 CONFIG_MSM_CACHE_ERP=y
 CONFIG_MSM_L1_ERR_PANIC=y
 CONFIG_MSM_L1_RECOV_ERR_PANIC=y
 CONFIG_MSM_L1_ERR_LOG=y
 CONFIG_MSM_L2_ERP_PRINT_ACCESS_ERRORS=y
-CONFIG_MSM_L2_ERP_PORT_PANIC=y
-CONFIG_MSM_L2_ERP_2BIT_PANIC=y
+#CONFIG_MSM_L2_ERP_PORT_PANIC=y
+#CONFIG_MSM_L2_ERP_2BIT_PANIC=y
 # CONFIG_MSM_CACHE_DUMP is not set
 # CONFIG_MSM_CACHE_DUMP_ON_PANIC is not set
 CONFIG_MSM_ENABLE_WDOG_DEBUG_CONTROL=y

drivers/crypto/msm/qce50.c

@@ -3444,46 +3444,13 @@ static int __qce_init_clk(struct qce_device *pce_dev)
 
 void qce_suspend(void *p)
 {
-	int	ret = 0;
-	struct qce_device *pce_dev = (struct qce_device *)p;
-	if (!pce_dev)
-		return;
-
-	ret = qce_enable_clk(p);
-	if (ret) {
-		pr_err("%s Unable enable clk\n", __func__);
-		return;
-	}
-
-	qce_sps_exit_ep_conn(pce_dev, &pce_dev->ce_sps.consumer);
-	qce_sps_exit_ep_conn(pce_dev, &pce_dev->ce_sps.producer);
-
-	qce_disable_clk(p);
 	return;
 
 }
 EXPORT_SYMBOL(qce_suspend);
 
 void qce_resume(void *p)
 {
-	int	ret = 0;
-	struct qce_device *pce_dev = (struct qce_device *)p;
-	if (!pce_dev)
-		return;
-
-	ret = qce_enable_clk(p);
-	if (ret) {
-		pr_err("%s Unable enable clk.\n", __func__);
-		return;
-	}
-	ret = qce_sps_init(pce_dev);
-	if (ret) {
-		pr_err("%s Unable init sps.\n", __func__);
-		return;
-	}
-	qce_init_ce_cfg_val(pce_dev);
-	qce_setup_ce_sps_data(pce_dev);
-	qce_disable_clk(p);
 
 }
 EXPORT_SYMBOL(qce_resume);

drivers/crypto/msm/qcrypto.c

@@ -3561,12 +3561,13 @@ static struct crypto_alg _qcrypto_aead_ccm_algo = {
 	}
 };
 
+struct crypto_priv *cp;
 
 static int  _qcrypto_probe(struct platform_device *pdev)
 {
 	int rc = 0;
 	void *handle;
-	struct crypto_priv *cp;
+
 	int i;
 	struct msm_ce_hw_support *platform_support;
 
@@ -3798,24 +3799,66 @@ static int  _qcrypto_probe(struct platform_device *pdev)
 
 static int  _qcrypto_suspend(struct platform_device *pdev, pm_message_t state)
 {
-	if (qseecom_created_key_flag == true)
+	if (qseecom_created_key_flag == true) {
+		int ret = 0;
+		mutex_lock(&qcrypto_sent_bw_req);
+		if (cp->high_bw_req == true) {
+			del_timer_sync(&(cp->bw_scale_down_timer));
+			ret = msm_bus_scale_client_update_request(
+					cp->bus_scale_handle, 0);
+			if (ret) {
+				pr_err("%s Unable to set to low bandwidth\n",
+							__func__);
+				return ret;
+			}
+			ret = qce_disable_clk(cp->qce);
+			if (ret) {
+				pr_err("%s Unable disable clk\n", __func__);
+				ret = msm_bus_scale_client_update_request(
+					cp->bus_scale_handle, 1);
+				if (ret)
+					pr_err("%s Unable to set to high bandwidth\n",
+							__func__);
+				return ret;
+			}
+		}
+		mutex_unlock(&qcrypto_sent_bw_req);
 		qce_suspend(((struct crypto_priv *)
 					platform_get_drvdata(pdev))->qce);
+	}
 	return 0;
 }
 
 static int  _qcrypto_resume(struct platform_device *pdev)
 {
 	if (qseecom_created_key_flag == true) {
 		int ret = 0;
-		uint8_t hash32[32] = {0};
 
-		ret = qseecom_create_key_kclient(
-			QSEOS_KM_USAGE_DISK_ENCRYPTION, hash32);
-		if (ret) {
-			pr_err("create key error in _qcrypto_resume.\n");
-			return ret;
+		mutex_lock(&qcrypto_sent_bw_req);
+		if (cp->high_bw_req == true) {
+			ret = qce_enable_clk(cp->qce);
+			if (ret) {
+				pm_relax(&cp->pdev->dev);
+				pr_err("%s Unable enable clk\n", __func__);
+				return ret;
+			}
+			ret = msm_bus_scale_client_update_request(
+				cp->bus_scale_handle, 1);
+			if (ret) {
+				pr_err("%s Unable to set to high bandwidth\n",
+						__func__);
+				qce_disable_clk(cp->qce);
+				return ret;
+			}
+
+			cp->bw_scale_down_timer.data =
+				(unsigned long)(cp);
+			cp->bw_scale_down_timer.expires = jiffies +
+			msecs_to_jiffies(QCRYPTO_HIGH_BANDWIDTH_TIMEOUT);
+			add_timer(&(cp->bw_scale_down_timer));
 		}
+		mutex_unlock(&qcrypto_sent_bw_req);
+
 		qce_resume(((struct crypto_priv *)
 				platform_get_drvdata(pdev))->qce);
 	}

drivers/gpio/gpiolib.c

@@ -670,8 +670,8 @@ static ssize_t unexport_store(struct class *class,
 }
 
 static struct class_attribute gpio_class_attrs[] = {
-	__ATTR(export, 0222, NULL, export_store),
-	__ATTR(unexport, 0222, NULL, unexport_store),
+	__ATTR(export, 0220, NULL, export_store),
+	__ATTR(unexport, 0220, NULL, unexport_store),
 	__ATTR_NULL,
 };
 

drivers/gpu/msm/adreno.c

@@ -838,8 +838,10 @@ static void adreno_iommu_setstate(struct kgsl_device *device,
 	num_iommu_units = kgsl_mmu_get_num_iommu_units(&device->mmu);
 
 	context = idr_find(&device->context_idr, context_id);
-	if (context == NULL)
+	if (context == NULL) {
+		kgsl_mmu_device_setstate(&device->mmu, KGSL_CONTEXT_INVALID);
 		return;
+	}
 
 	kgsl_context_get(context);
 

drivers/gpu/msm/kgsl.c

@@ -59,6 +59,9 @@ struct kgsl_dma_buf_meta {
 	struct sg_table *table;
 };
 
+static void kgsl_put_process_private(struct kgsl_device *device,
+			 struct kgsl_process_private *private);
+
 static void kgsl_mem_entry_detach_process(struct kgsl_mem_entry *entry);
 
 /**
@@ -386,14 +389,19 @@ kgsl_mem_entry_untrack_gpuaddr(struct kgsl_process_private *process,
  */
 static int
 kgsl_mem_entry_attach_process(struct kgsl_mem_entry *entry,
-				   struct kgsl_process_private *process)
+				   struct kgsl_device_private *dev_priv)
 {
 	int ret;
+	struct kgsl_process_private *process = dev_priv->process_priv;
+
+	ret = kref_get_unless_zero(&process->refcount);
+	if (!ret)
+		return -EBADF;
 
 	while (1) {
 		if (idr_pre_get(&process->mem_idr, GFP_KERNEL) == 0) {
 			ret = -ENOMEM;
-			goto err;
+			goto err_put_proc_priv;
 		}
 
 		spin_lock(&process->mem_lock);
@@ -404,24 +412,28 @@ kgsl_mem_entry_attach_process(struct kgsl_mem_entry *entry,
 		if (ret == 0)
 			break;
 		else if (ret != -EAGAIN)
-			goto err;
+			goto err_put_proc_priv;
 	}
 	entry->priv = process;
+	entry->dev_priv = dev_priv;
 
 	spin_lock(&process->mem_lock);
 	ret = kgsl_mem_entry_track_gpuaddr(process, entry);
 	if (ret)
 		idr_remove(&process->mem_idr, entry->id);
 	spin_unlock(&process->mem_lock);
 	if (ret)
-		goto err;
+		goto err_put_proc_priv;
 	/* map the memory after unlocking if gpuaddr has been assigned */
 	if (entry->memdesc.gpuaddr) {
 		ret = kgsl_mmu_map(process->pagetable, &entry->memdesc);
 		if (ret)
 			kgsl_mem_entry_detach_process(entry);
 	}
-err:
+	return ret;
+
+err_put_proc_priv:
+	kgsl_put_process_private(dev_priv->device, process);
 	return ret;
 }
 
@@ -444,6 +456,7 @@ static void kgsl_mem_entry_detach_process(struct kgsl_mem_entry *entry)
 
 	entry->priv->stats[entry->memtype].cur -= entry->memdesc.size;
 	spin_unlock(&entry->priv->mem_lock);
+	kgsl_put_process_private(entry->dev_priv->device, entry->priv);
 
 	entry->priv = NULL;
 }
@@ -770,11 +783,6 @@ EXPORT_SYMBOL(kgsl_resume_driver);
  */
 static void kgsl_destroy_process_private(struct kref *kref)
 {
-
-	struct kgsl_mem_entry *entry = NULL;
-	int next = 0;
-
-
 	struct kgsl_process_private *private = container_of(kref,
 			struct kgsl_process_private, refcount);
 
@@ -798,20 +806,6 @@ static void kgsl_destroy_process_private(struct kref *kref)
 	if (private->debug_root)
 		debugfs_remove_recursive(private->debug_root);
 
-	while (1) {
-		rcu_read_lock();
-		entry = idr_get_next(&private->mem_idr, &next);
-		rcu_read_unlock();
-		if (entry == NULL)
-			break;
-		kgsl_mem_entry_put(entry);
-		/*
-		 * Always start back at the beginning, to
-		 * ensure all entries are removed,
-		 * like list_for_each_entry_safe.
-		 */
-		next = 0;
-	}
 	kgsl_mmu_putpagetable(private->pagetable);
 	idr_destroy(&private->mem_idr);
 
@@ -952,6 +946,7 @@ static int kgsl_release(struct inode *inodep, struct file *filep)
 	struct kgsl_process_private *private = dev_priv->process_priv;
 	struct kgsl_device *device = dev_priv->device;
 	struct kgsl_context *context;
+	struct kgsl_mem_entry *entry;
 	int next = 0;
 
 	filep->private_data = NULL;
@@ -971,6 +966,25 @@ static int kgsl_release(struct inode *inodep, struct file *filep)
 
 		next = next + 1;
 	}
+	next = 0;
+	while (1) {
+		spin_lock(&private->mem_lock);
+		entry = idr_get_next(&private->mem_idr, &next);
+		spin_unlock(&private->mem_lock);
+		if (entry == NULL)
+			break;
+		/*
+		 * If the free pending flag is not set it means that user space
+		 * did not free it's reference to this entry, in that case
+		 * free a reference to this entry, other references are from
+		 * within kgsl so they will be freed eventually by kgsl
+		 */
+		if (entry->dev_priv == dev_priv && !entry->pending_free) {
+			entry->pending_free = 1;
+			kgsl_mem_entry_put(entry);
+		}
+		next = next + 1;
+	}
 	/*
 	 * Clean up any to-be-freed entries that belong to this
 	 * process and this device. This is done after the context
@@ -2199,7 +2213,7 @@ static long kgsl_ioctl_map_user_mem(struct kgsl_device_private *dev_priv,
 	/* echo back flags */
 	param->flags = entry->memdesc.flags;
 
-	result = kgsl_mem_entry_attach_process(entry, private);
+	result = kgsl_mem_entry_attach_process(entry, dev_priv);
 	if (result)
 		goto error_attach;
 
@@ -2475,7 +2489,7 @@ kgsl_ioctl_gpumem_alloc(struct kgsl_device_private *dev_priv,
 	if (result)
 		return result;
 
-	result = kgsl_mem_entry_attach_process(entry, private);
+	result = kgsl_mem_entry_attach_process(entry, dev_priv);
 	if (result != 0)
 		goto err;
 
@@ -2508,7 +2522,7 @@ kgsl_ioctl_gpumem_alloc_id(struct kgsl_device_private *dev_priv,
 	if (result != 0)
 		goto err;
 
-	result = kgsl_mem_entry_attach_process(entry, private);
+	result = kgsl_mem_entry_attach_process(entry, dev_priv);
 	if (result != 0)
 		goto err;
 

drivers/gpu/msm/kgsl.h

@@ -197,6 +197,7 @@ struct kgsl_mem_entry {
 	struct kgsl_process_private *priv;
 	/* Initialized to 0, set to 1 when entry is marked for freeing */
 	int pending_free;
+	struct kgsl_device_private *dev_priv;
 };
 
 #ifdef CONFIG_MSM_KGSL_MMU_PAGE_FAULT