These are my projects for EE5301 which was a VLSI Design Automation class. In these assignments, we were usually implementing some type of VLSI design algorithm used in VLSI design tools.
A Basic circuit file parser. Parse a bunch of gates and their delay and skew values.
Used the Circuit parser from PA0 and created an adjacency list of the gates. It then evaluated the timing of the corresponding circuit.
Used an Annealing Algorithm to floorplan a chip.