rp2/boards/RPI_PICO2_W: Add RISCV variant for Pico 2 W.

Build with: make BOARD=RPI_PICO2_W BOARD_VARIANT=RISCV Signed-off-by: Peter Harper <[email protected]>
IhorNehrutsa · Dec 19, 2024 · a70a90c · a70a90c
1 parent 1b611da
commit a70a90c
Show file tree

Hide file tree

Showing 3 changed files with 5 additions and 1 deletion.
diff --git a/ports/rp2/CMakeLists.txt b/ports/rp2/CMakeLists.txt
@@ -407,7 +407,6 @@ if (MICROPY_PY_NETWORK_CYW43)
 
     target_link_libraries(${MICROPY_TARGET}
         cyw43_driver_picow
-        cmsis_core
     )
     target_include_directories(${MICROPY_TARGET} PRIVATE
         ${MICROPY_DIR}/lib/cyw43-driver/

diff --git a/ports/rp2/boards/RPI_PICO2_W/mpconfigvariant_RISCV.cmake b/ports/rp2/boards/RPI_PICO2_W/mpconfigvariant_RISCV.cmake
@@ -0,0 +1 @@
+set(PICO_PLATFORM "rp2350-riscv")
diff --git a/ports/rp2/mpnetworkport.c b/ports/rp2/mpnetworkport.c
@@ -44,13 +44,15 @@ static soft_timer_entry_t mp_network_soft_timer;
 #include "lib/cyw43-driver/src/cyw43_stats.h"
 #include "hardware/irq.h"
 
+#if !defined(__riscv)
 #if PICO_RP2040
 #include "RP2040.h" // cmsis, for NVIC_SetPriority and PendSV_IRQn
 #elif PICO_RP2350
 #include "RP2350.h" // cmsis, for NVIC_SetPriority and PendSV_IRQn
 #else
 #error Unknown processor
 #endif
+#endif
 
 #define CYW43_IRQ_LEVEL GPIO_IRQ_LEVEL_HIGH
 #define CYW43_SHARED_IRQ_HANDLER_PRIORITY PICO_SHARED_IRQ_HANDLER_HIGHEST_ORDER_PRIORITY
@@ -74,7 +76,9 @@ static void gpio_irq_handler(void) {
 void cyw43_irq_init(void) {
     gpio_add_raw_irq_handler_with_order_priority(CYW43_PIN_WL_HOST_WAKE, gpio_irq_handler, CYW43_SHARED_IRQ_HANDLER_PRIORITY);
     irq_set_enabled(IO_IRQ_BANK0, true);
+    #if !defined(__riscv)
     NVIC_SetPriority(PendSV_IRQn, IRQ_PRI_PENDSV);
+    #endif
 }
 
 void cyw43_post_poll_hook(void) {