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IRDumper: Allow const RA data #4315

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merged 1 commit into from
Jan 31, 2025
Merged

IRDumper: Allow const RA data #4315

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2 changes: 1 addition & 1 deletion FEXCore/Source/Interface/IR/IR.h
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Original file line number Diff line number Diff line change
Expand Up @@ -724,7 +724,7 @@ inline NodeID NodeWrapperBase<Type>::ID() const {
bool IsFragmentExit(FEXCore::IR::IROps Op);
bool IsBlockExit(FEXCore::IR::IROps Op);

void Dump(fextl::stringstream* out, const IRListView* IR, IR::RegisterAllocationData* RAData);
void Dump(fextl::stringstream* out, const IRListView* IR, const IR::RegisterAllocationData* RAData);
} // namespace FEXCore::IR

template<>
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4 changes: 2 additions & 2 deletions FEXCore/Source/Interface/IR/IRDumper.cpp
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Expand Up @@ -82,7 +82,7 @@ static void PrintArg(fextl::stringstream* out, [[maybe_unused]] const IRListView
}
}

static void PrintArg(fextl::stringstream* out, const IRListView* IR, OrderedNodeWrapper Arg, IR::RegisterAllocationData* RAData) {
static void PrintArg(fextl::stringstream* out, const IRListView* IR, OrderedNodeWrapper Arg, const IR::RegisterAllocationData* RAData) {
auto [CodeNode, IROp] = IR->at(Arg)();
const auto ArgID = Arg.ID();

Expand Down Expand Up @@ -271,7 +271,7 @@ static void PrintArg(fextl::stringstream* out, [[maybe_unused]] const IRListView
}
}

void Dump(fextl::stringstream* out, const IRListView* IR, IR::RegisterAllocationData* RAData) {
void Dump(fextl::stringstream* out, const IRListView* IR, const IR::RegisterAllocationData* RAData) {
auto HeaderOp = IR->GetHeader();

int8_t CurrentIndent = 0;
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