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Negate more to inline constants #3551

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merged 3 commits into from
Apr 3, 2024
Merged

Negate more to inline constants #3551

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fa76961
ConstProp: negate adds -> subs
alyssarosenzweig Apr 2, 2024
e07c81a
ConstProp: also negate sub -> add
alyssarosenzweig Apr 2, 2024
d6425d0
InstCountCI: Update
alyssarosenzweig Apr 2, 2024
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37 changes: 19 additions & 18 deletions FEXCore/Source/Interface/IR/Passes/ConstProp.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -681,23 +681,37 @@ bool ConstProp::ConstantPropagation(IREmitter *IREmit, const IRListView& Current
break;
}

case OP_ADD: {
case OP_ADD:
case OP_SUB:
case OP_ADDWITHFLAGS:
case OP_SUBWITHFLAGS: {
auto Op = IROp->C<IR::IROp_Add>();
uint64_t Constant1{};
uint64_t Constant2{};
bool IsConstant1 = IREmit->IsValueConstant(Op->Header.Args[0], &Constant1);
bool IsConstant2 = IREmit->IsValueConstant(Op->Header.Args[1], &Constant2);

if (IsConstant1 && IsConstant2) {
if (IsConstant1 && IsConstant2 && IROp->Op == OP_ADD) {
uint64_t NewConstant = (Constant1 + Constant2) & getMask(Op) ;
IREmit->ReplaceWithConstant(CodeNode, NewConstant);
Changed = true;
} else if (IsConstant1 && IsConstant2 && IROp->Op == OP_SUB) {
uint64_t NewConstant = (Constant1 - Constant2) & getMask(Op) ;
IREmit->ReplaceWithConstant(CodeNode, NewConstant);
Changed = true;
}
else if (IsConstant2 && !IsImmAddSub(Constant2) && IsImmAddSub(-Constant2)) {
// If the second argument is constant, the immediate is not ImmAddSub, but when negated is.
// This means we can convert the operation in to a subtract.
// Change the IR operation itself.
IROp->Op = OP_SUB;
// So, negate the operation to negate (and inline) the constant.
if (IROp->Op == OP_ADD)
IROp->Op = OP_SUB;
else if (IROp->Op == OP_SUB)
IROp->Op = OP_ADD;
else if (IROp->Op == OP_ADDWITHFLAGS)
IROp->Op = OP_SUBWITHFLAGS;
else if (IROp->Op == OP_SUBWITHFLAGS)
IROp->Op = OP_ADDWITHFLAGS;

// Set the write cursor to just before this operation.
auto CodeIter = CurrentIR.at(CodeNode);
--CodeIter;
Expand All @@ -712,19 +726,6 @@ bool ConstProp::ConstantPropagation(IREmitter *IREmit, const IRListView& Current
}
break;
}
case OP_SUB: {
auto Op = IROp->C<IR::IROp_Sub>();
uint64_t Constant1{};
uint64_t Constant2{};

if (IREmit->IsValueConstant(Op->Header.Args[0], &Constant1) &&
IREmit->IsValueConstant(Op->Header.Args[1], &Constant2)) {
uint64_t NewConstant = (Constant1 - Constant2) & getMask(Op) ;
IREmit->ReplaceWithConstant(CodeNode, NewConstant);
Changed = true;
}
break;
}
case OP_SUBSHIFT: {
auto Op = IROp->C<IR::IROp_SubShift>();

Expand Down
15 changes: 6 additions & 9 deletions unittests/InstructionCountCI/FlagM/Primary.json
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -182,12 +182,11 @@
]
},
"add rax, -1": {
"ExpectedInstructionCount": 4,
"ExpectedInstructionCount": 3,
"Comment": "0x05",
"ExpectedArm64ASM": [
"mov x20, #0xffffffffffffffff",
"mvn w27, w4",
"adds x26, x4, x20",
"subs x26, x4, #0x1 (1)",
"mov x4, x26"
]
},
Expand Down Expand Up @@ -1259,12 +1258,11 @@
]
},
"sub rax, -1": {
"ExpectedInstructionCount": 5,
"ExpectedInstructionCount": 4,
"Comment": "0x2D",
"ExpectedArm64ASM": [
"mov x20, #0xffffffffffffffff",
"mvn w27, w4",
"subs x26, x4, x20",
"adds x26, x4, #0x1 (1)",
"cfinv",
"mov x4, x26"
]
Expand Down Expand Up @@ -1596,12 +1594,11 @@
]
},
"cmp rax, -1": {
"ExpectedInstructionCount": 4,
"ExpectedInstructionCount": 3,
"Comment": "0x3D",
"ExpectedArm64ASM": [
"mov x20, #0xffffffffffffffff",
"mvn w27, w4",
"subs x26, x4, x20",
"adds x26, x4, #0x1 (1)",
"cfinv"
]
},
Expand Down
30 changes: 12 additions & 18 deletions unittests/InstructionCountCI/FlagM/PrimaryGroup.json
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -422,12 +422,11 @@
]
},
"add rax, -256": {
"ExpectedInstructionCount": 4,
"ExpectedInstructionCount": 3,
"Comment": "GROUP1 0x81 /0",
"ExpectedArm64ASM": [
"mov x20, #0xffffffffffffff00",
"mov x27, x4",
"adds x26, x27, x20",
"subs x26, x27, #0x100 (256)",
"mov x4, x26"
]
},
Expand Down Expand Up @@ -521,12 +520,11 @@
]
},
"sub rax, -256": {
"ExpectedInstructionCount": 5,
"ExpectedInstructionCount": 4,
"Comment": "GROUP1 0x81 /5",
"ExpectedArm64ASM": [
"mov x20, #0xffffffffffffff00",
"mov x27, x4",
"subs x26, x27, x20",
"adds x26, x27, #0x100 (256)",
"cfinv",
"mov x4, x26"
]
Expand Down Expand Up @@ -560,12 +558,11 @@
]
},
"cmp rax, -256": {
"ExpectedInstructionCount": 4,
"ExpectedInstructionCount": 3,
"Comment": "GROUP1 0x81 /7",
"ExpectedArm64ASM": [
"mov x20, #0xffffffffffffff00",
"mov x27, x4",
"subs x26, x27, x20",
"adds x26, x27, #0x100 (256)",
"cfinv"
]
},
Expand Down Expand Up @@ -757,12 +754,11 @@
]
},
"add rax, -1": {
"ExpectedInstructionCount": 4,
"ExpectedInstructionCount": 3,
"Comment": "GROUP1 0x83 /0",
"ExpectedArm64ASM": [
"mov x20, #0xffffffffffffffff",
"mvn w27, w4",
"adds x26, x4, x20",
"subs x26, x4, #0x1 (1)",
"mov x4, x26"
]
},
Expand Down Expand Up @@ -860,12 +856,11 @@
]
},
"sub rax, -1": {
"ExpectedInstructionCount": 5,
"ExpectedInstructionCount": 4,
"Comment": "GROUP1 0x83 /5",
"ExpectedArm64ASM": [
"mov x20, #0xffffffffffffffff",
"mvn w27, w4",
"subs x26, x4, x20",
"adds x26, x4, #0x1 (1)",
"cfinv",
"mov x4, x26"
]
Expand Down Expand Up @@ -901,12 +896,11 @@
]
},
"cmp rax, -1": {
"ExpectedInstructionCount": 4,
"ExpectedInstructionCount": 3,
"Comment": "GROUP1 0x83 /7",
"ExpectedArm64ASM": [
"mov x20, #0xffffffffffffffff",
"mvn w27, w4",
"subs x26, x4, x20",
"adds x26, x4, #0x1 (1)",
"cfinv"
]
},
Expand Down
15 changes: 6 additions & 9 deletions unittests/InstructionCountCI/Primary.json
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -181,12 +181,11 @@
]
},
"add rax, -1": {
"ExpectedInstructionCount": 4,
"ExpectedInstructionCount": 3,
"Comment": "0x05",
"ExpectedArm64ASM": [
"mov x20, #0xffffffffffffffff",
"mvn w27, w4",
"adds x26, x4, x20",
"subs x26, x4, #0x1 (1)",
"mov x4, x26"
]
},
Expand Down Expand Up @@ -1368,12 +1367,11 @@
]
},
"sub rax, -1": {
"ExpectedInstructionCount": 7,
"ExpectedInstructionCount": 6,
"Comment": "0x2D",
"ExpectedArm64ASM": [
"mov x20, #0xffffffffffffffff",
"mvn w27, w4",
"subs x26, x4, x20",
"adds x26, x4, #0x1 (1)",
"mrs x20, nzcv",
"eor w20, w20, #0x20000000",
"mov x4, x26",
Expand Down Expand Up @@ -1737,12 +1735,11 @@
]
},
"cmp rax, -1": {
"ExpectedInstructionCount": 6,
"ExpectedInstructionCount": 5,
"Comment": "0x3D",
"ExpectedArm64ASM": [
"mov x20, #0xffffffffffffffff",
"mvn w27, w4",
"subs x26, x4, x20",
"adds x26, x4, #0x1 (1)",
"mrs x20, nzcv",
"eor w20, w20, #0x20000000",
"msr nzcv, x20"
Expand Down
30 changes: 12 additions & 18 deletions unittests/InstructionCountCI/PrimaryGroup.json
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -461,12 +461,11 @@
]
},
"add rax, -256": {
"ExpectedInstructionCount": 4,
"ExpectedInstructionCount": 3,
"Comment": "GROUP1 0x81 /0",
"ExpectedArm64ASM": [
"mov x20, #0xffffffffffffff00",
"mov x27, x4",
"adds x26, x27, x20",
"subs x26, x27, #0x100 (256)",
"mov x4, x26"
]
},
Expand Down Expand Up @@ -570,12 +569,11 @@
]
},
"sub rax, -256": {
"ExpectedInstructionCount": 7,
"ExpectedInstructionCount": 6,
"Comment": "GROUP1 0x81 /5",
"ExpectedArm64ASM": [
"mov x20, #0xffffffffffffff00",
"mov x27, x4",
"subs x26, x27, x20",
"adds x26, x27, #0x100 (256)",
"mrs x20, nzcv",
"eor w20, w20, #0x20000000",
"mov x4, x26",
Expand Down Expand Up @@ -613,12 +611,11 @@
]
},
"cmp rax, -256": {
"ExpectedInstructionCount": 6,
"ExpectedInstructionCount": 5,
"Comment": "GROUP1 0x81 /7",
"ExpectedArm64ASM": [
"mov x20, #0xffffffffffffff00",
"mov x27, x4",
"subs x26, x27, x20",
"adds x26, x27, #0x100 (256)",
"mrs x20, nzcv",
"eor w20, w20, #0x20000000",
"msr nzcv, x20"
Expand Down Expand Up @@ -828,12 +825,11 @@
]
},
"add rax, -1": {
"ExpectedInstructionCount": 4,
"ExpectedInstructionCount": 3,
"Comment": "GROUP1 0x83 /0",
"ExpectedArm64ASM": [
"mov x20, #0xffffffffffffffff",
"mvn w27, w4",
"adds x26, x4, x20",
"subs x26, x4, #0x1 (1)",
"mov x4, x26"
]
},
Expand Down Expand Up @@ -941,12 +937,11 @@
]
},
"sub rax, -1": {
"ExpectedInstructionCount": 7,
"ExpectedInstructionCount": 6,
"Comment": "GROUP1 0x83 /5",
"ExpectedArm64ASM": [
"mov x20, #0xffffffffffffffff",
"mvn w27, w4",
"subs x26, x4, x20",
"adds x26, x4, #0x1 (1)",
"mrs x20, nzcv",
"eor w20, w20, #0x20000000",
"mov x4, x26",
Expand Down Expand Up @@ -986,12 +981,11 @@
]
},
"cmp rax, -1": {
"ExpectedInstructionCount": 6,
"ExpectedInstructionCount": 5,
"Comment": "GROUP1 0x83 /7",
"ExpectedArm64ASM": [
"mov x20, #0xffffffffffffffff",
"mvn w27, w4",
"subs x26, x4, x20",
"adds x26, x4, #0x1 (1)",
"mrs x20, nzcv",
"eor w20, w20, #0x20000000",
"msr nzcv, x20"
Expand Down
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