smash

FEXCore/Source/Interface/Core/JIT/Arm64/ALUOps.cpp

@@ -402,6 +402,24 @@ DEF_OP(CondAddNZCV) {
   }
 }
 
+DEF_OP(CondSubNZCV) {
+  auto Op = IROp->C<IR::IROp_CondSubNZCV>();
+  const auto OpSize = IROp->Size;
+
+  LOGMAN_THROW_AA_FMT(OpSize == IR::i32Bit || OpSize == IR::i64Bit, "Unsupported {} size: {}", __func__, OpSize);
+  const auto EmitSize = OpSize == IR::i64Bit ? ARMEmitter::Size::i64Bit : ARMEmitter::Size::i32Bit;
+
+  ARMEmitter::StatusFlags Flags = (ARMEmitter::StatusFlags)Op->FalseNZCV;
+  uint64_t Const = 0;
+  auto Src1 = GetZeroableReg(Op->Src1);
+
+  if (IsInlineConstant(Op->Src2, &Const)) {
+    ccmp(EmitSize, Src1, Const, Flags, MapSelectCC(Op->Cond));
+  } else {
+    ccmp(EmitSize, Src1, GetReg(Op->Src2.ID()), Flags, MapSelectCC(Op->Cond));
+  }
+}
+
 DEF_OP(Neg) {
   auto Op = IROp->C<IR::IROp_Neg>();
   const uint8_t OpSize = IROp->Size;

FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp

@@ -3617,26 +3617,24 @@ void OpDispatchBuilder::CMPSOp(OpcodeArgs) {
 
     bool REPE = Op->Flags & FEXCore::X86Tables::DecodeFlags::FLAG_REP_PREFIX;
 
-    // read DF once
-    auto PtrDir = LoadDir(Size);
-
-    auto JumpStart = Jump();
-    // Make sure to start a new block after ending this one
-    auto LoopStart = CreateNewCodeBlockAfter(GetCurrentBlock());
-    SetJumpTarget(JumpStart, LoopStart);
-    SetCurrentCodeBlock(LoopStart);
-    StartNewBlock();
-
+    // If rcx = 0, skip the whole loop.
     OrderedNode *Counter = LoadGPRRegister(X86State::REG_RCX);
+    auto OuterJump = CondJump(Counter, {COND_EQ});
+    IRPair<IROp_CondJump> InnerJump;
 
-    // Can we end the block?
-    auto CondJump_ = CondJump(Counter, {COND_EQ});
-    IRPair<IROp_CondJump> InternalCondJump;
+    // read DF once, outside the loop
+    auto BeforeLoop = CreateNewCodeBlockAfter(GetCurrentBlock());
+    SetFalseJumpTarget(OuterJump, BeforeLoop);
+    SetCurrentCodeBlock(BeforeLoop);
+    StartNewBlock();
+    auto PtrDir = LoadDir(Size);
+    auto JumpIntoLoop = Jump();
 
-    auto LoopTail = CreateNewCodeBlockAfter(LoopStart);
-    SetFalseJumpTarget(CondJump_, LoopTail);
-    SetCurrentCodeBlock(LoopTail);
+    // Setup for the loop
+    auto LoopHeader = CreateNewCodeBlockAfter(GetCurrentBlock());
+    SetCurrentCodeBlock(LoopHeader);
     StartNewBlock();
+    SetJumpTarget(JumpIntoLoop, LoopHeader);
 
     // Working loop
     {
@@ -3651,15 +3649,14 @@ void OpDispatchBuilder::CMPSOp(OpcodeArgs) {
       auto Src1 = _LoadMemAutoTSO(GPRClass, Size, Dest_RDI, Size);
       auto Src2 = _LoadMem(GPRClass, Size, Dest_RSI, Size);
 
-      GenerateFlags_SUB(Op, Src2, Src1);
-
-      // Calculate flags early.
-      CalculateDeferredFlags();
+      // We'll calculate PF/AF after the loop, so use them as temporaries here.
+      _StoreRegister(Src1, false, offsetof(FEXCore::Core::CPUState, pf_raw), GPRClass, GPRFixedClass, CTX->GetGPRSize());
+      _StoreRegister(Src2, false, offsetof(FEXCore::Core::CPUState, af_raw), GPRClass, GPRFixedClass, CTX->GetGPRSize());
 
       OrderedNode *TailCounter = LoadGPRRegister(X86State::REG_RCX);
 
       // Decrement counter
-      TailCounter = _Sub(OpSize::i64Bit, TailCounter, _Constant(1));
+      TailCounter = _SubWithFlags(OpSize::i64Bit, TailCounter, _Constant(1));
 
       // Store the counter since we don't have phis
       StoreGPRRegister(X86State::REG_RCX, TailCounter);
@@ -3672,21 +3669,37 @@ void OpDispatchBuilder::CMPSOp(OpcodeArgs) {
       Dest_RSI = _Add(OpSize::i64Bit, Dest_RSI, PtrDir);
       StoreGPRRegister(X86State::REG_RSI, Dest_RSI);
 
-      CalculateDeferredFlags();
-      InternalCondJump = CondJumpNZCV({REPE ? COND_EQ : COND_NEQ});
+      // If TailCounter != 0, compare sources.
+      // If TailCounter == 0, set ZF iff that would break.
+      _CondSubNZCV(OpSize::i64Bit, Src2, Src1, {COND_NEQ}, REPE ? 0 : (1 << 2) /* Z */);
+      CachedNZCV = nullptr;
+      NZCVDirty = false;
+      InnerJump = CondJumpNZCV({REPE ? COND_EQ : COND_NEQ});
 
       // Jump back to the start if we have more work to do
-      SetTrueJumpTarget(InternalCondJump, LoopStart);
+      SetTrueJumpTarget(InnerJump, LoopHeader);
     }
 
     // Make sure to start a new block after ending this one
-    auto LoopEnd = CreateNewCodeBlockAfter(LoopTail);
-    SetTrueJumpTarget(CondJump_, LoopEnd);
-
-    SetFalseJumpTarget(InternalCondJump, LoopEnd);
+    auto LoopEnd = CreateNewCodeBlockAfter(GetCurrentBlock());
+    SetFalseJumpTarget(InnerJump, LoopEnd);
 
     SetCurrentCodeBlock(LoopEnd);
     StartNewBlock();
+    {
+      // Grab the sources from the last iteration so we can set flags.
+      auto Src1 = _LoadRegister(false, offsetof(FEXCore::Core::CPUState, pf_raw), GPRClass, GPRFixedClass, CTX->GetGPRSize());
+      auto Src2 = _LoadRegister(false, offsetof(FEXCore::Core::CPUState, af_raw), GPRClass, GPRFixedClass, CTX->GetGPRSize());
+      GenerateFlags_SUB(Op, Src2, Src1);
+      CalculateDeferredFlags();
+    }
+    auto Jump_ = Jump();
+
+    auto Exit = CreateNewCodeBlockAfter(LoopEnd);
+    SetJumpTarget(Jump_, Exit);
+    SetTrueJumpTarget(OuterJump, Exit);
+    SetCurrentCodeBlock(Exit);
+    StartNewBlock();
   }
 }
 

FEXCore/Source/Interface/IR/IR.json

@@ -1035,6 +1035,14 @@
           "Size == FEXCore::IR::OpSize::i32Bit || Size == FEXCore::IR::OpSize::i64Bit"
         ]
       },
+      "CondSubNZCV OpSize:#Size, GPR:$Src1, GPR:$Src2, CondClass:$Cond, u8:$FalseNZCV": {
+        "Desc": ["If condition is true, set NZCV per difference of GPRs, else force NZCV to a constant."],
+        "HasSideEffects": true,
+        "DestSize": "Size",
+        "EmitValidation": [
+          "Size == FEXCore::IR::OpSize::i32Bit || Size == FEXCore::IR::OpSize::i64Bit"
+        ]
+      },
       "GPR = AdcWithFlags OpSize:#Size, GPR:$Src1, GPR:$Src2": {
         "Desc": ["Adds and set NZCV for the sum of two GPRs and carry-in given as NZCV"],
         "HasSideEffects": true,

FEXCore/Source/Interface/IR/Passes/ConstProp.cpp

@@ -1139,6 +1139,7 @@ bool ConstProp::ConstantInlining(IREmitter *IREmit, const IRListView& CurrentIR)
         break;
       }
       case OP_CONDADDNZCV:
+      case OP_CONDSUBNZCV:
       {
         auto Op = IROp->C<IR::IROp_CondAddNZCV>();
 

FEXCore/Source/Interface/IR/Passes/RedundantFlagCalculationElimination.cpp

@@ -228,6 +228,7 @@ DeadFlagCalculationEliminination::Classify(IROp_Header *IROp)
       return {.Read = FlagsForCondClassType(Op->Cond)};
     }
 
+    case OP_CONDSUBNZCV:
     case OP_CONDADDNZCV: {
       auto Op = IROp->CW<IR::IROp_CondAddNZCV>();
       return {