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RA: Removes VLA usage #3537

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Mar 31, 2024
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RA: Removes VLA usage #3537

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6 changes: 4 additions & 2 deletions FEXCore/Source/Interface/IR/Passes/RegisterAllocationPass.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -297,6 +297,8 @@ namespace {
bool RunAllocateVirtualRegisters(IREmitter *IREmit);

uint64_t OriginalRIP;

fextl::vector<LiveRange*> StaticMaps;
};

ConstrainedRAPass::ConstrainedRAPass(FEXCore::IR::Pass* _CompactionPass, bool _SupportsAVX)
Expand Down Expand Up @@ -550,7 +552,7 @@ namespace {

auto GprSize = Graph->Set.Classes[GPRFixedClass.Val].PhysicalCount;
auto MapsSize = Graph->Set.Classes[GPRFixedClass.Val].PhysicalCount + Graph->Set.Classes[FPRFixedClass.Val].PhysicalCount;
LiveRange* StaticMaps[MapsSize];
StaticMaps.resize(MapsSize);

// Get a StaticMap entry from context offset
const auto GetStaticMapFromOffset = [&](uint32_t Offset) -> LiveRange** {
Expand Down Expand Up @@ -625,7 +627,7 @@ namespace {
// - Mark read-aliases
// - Demote read-aliases if SRA reg is written before the alias's last read
for (auto [BlockNode, BlockHeader] : IR->GetBlocks()) {
memset(StaticMaps, 0, MapsSize * sizeof(LiveRange*));
memset(StaticMaps.data(), 0, MapsSize * sizeof(LiveRange*));
for (auto [CodeNode, IROp] : IR->GetCode(BlockNode)) {
const auto Node = IR->GetID(CodeNode);
auto& NodeLiveRange = LiveRanges[Node.Value];
Expand Down
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