Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Externals: Update Catch2 to v3.5.3 #3484

Merged
merged 1 commit into from
Mar 5, 2024
Merged

Externals: Update Catch2 to v3.5.3 #3484

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
1 commit
Select commit
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
2 changes: 1 addition & 1 deletion External/Catch2
Open in desktop
Submodule Catch2 updated 742 files
2 changes: 1 addition & 1 deletion FEXCore/unittests/APITests/FileLoading.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
#include <FEXCore/Utils/FileLoading.h>
#include <catch2/catch.hpp>
#include <catch2/catch_test_macros.hpp>

TEST_CASE("LoadFile-Doesn'tExist") {
fextl::string MapsFile;
Expand Down
2 changes: 1 addition & 1 deletion FEXCore/unittests/APITests/FutexSpinTest.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
#include "Utils/SpinWaitLock.h"
#include <catch2/catch.hpp>
#include <catch2/catch_test_macros.hpp>
#include <chrono>
#include <thread>

Expand Down
3 changes: 2 additions & 1 deletion FEXCore/unittests/APITests/ILog2.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -1,5 +1,6 @@
#include <FEXCore/Utils/MathUtils.h>
#include <catch2/catch.hpp>
#include <catch2/catch_test_macros.hpp>
#include <catch2/generators/catch_generators_range.hpp>

TEST_CASE("ILog2") {
auto i = GENERATE(range(0, 64));
Expand Down
4 changes: 2 additions & 2 deletions FEXCore/unittests/Emitter/ALU_Tests.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
#include "TestDisassembler.h"

#include <catch2/catch.hpp>
#include <catch2/catch_test_macros.hpp>
#include <fcntl.h>

using namespace FEXCore::ARMEmitter;
Expand Down Expand Up @@ -450,7 +450,7 @@ TEST_CASE_METHOD(TestDisassembler, "Emitter: ALU: Bitfield") {

TEST_SINGLE(bfxil(Size::i32Bit, Reg::r29, Reg::r28, 4, 3), "bfxil w29, w28, #4, #3");
TEST_SINGLE(bfxil(Size::i32Bit, Reg::r29, Reg::r28, 27, 3), "bfxil w29, w28, #27, #3");

TEST_SINGLE(bfxil(Size::i64Bit, Reg::r29, Reg::r28, 4, 3), "bfxil x29, x28, #4, #3");
TEST_SINGLE(bfxil(Size::i64Bit, Reg::r29, Reg::r28, 57, 3), "bfxil x29, x28, #57, #3");

Expand Down
2 changes: 1 addition & 1 deletion FEXCore/unittests/Emitter/ASIMD_Tests.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
#include "TestDisassembler.h"

#include <catch2/catch.hpp>
#include <catch2/catch_test_macros.hpp>
#include <fcntl.h>

using namespace FEXCore::ARMEmitter;
Expand Down
2 changes: 1 addition & 1 deletion FEXCore/unittests/Emitter/Branch_Tests.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
#include "TestDisassembler.h"

#include <catch2/catch.hpp>
#include <catch2/catch_test_macros.hpp>
#include <fcntl.h>

using namespace FEXCore::ARMEmitter;
Expand Down
2 changes: 1 addition & 1 deletion FEXCore/unittests/Emitter/Loadstore_Tests.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
#include "TestDisassembler.h"

#include <catch2/catch.hpp>
#include <catch2/catch_test_macros.hpp>
#include <fcntl.h>

using namespace FEXCore::ARMEmitter;
Expand Down
24 changes: 12 additions & 12 deletions FEXCore/unittests/Emitter/SVE_Tests.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
#include "TestDisassembler.h"

#include <catch2/catch.hpp>
#include <catch2/catch_test_macros.hpp>
#include <fcntl.h>

using namespace FEXCore::ARMEmitter;
Expand Down Expand Up @@ -1177,23 +1177,23 @@ TEST_CASE_METHOD(TestDisassembler, "Emitter: SVE: SVE inc/dec vector by element
TEST_SINGLE(inch(ZReg::z30, PredicatePattern::SVE_POW2 , 1), "inch z30.h, pow2");
TEST_SINGLE(inch(ZReg::z30, PredicatePattern::SVE_VL256, 7), "inch z30.h, vl256, mul #7");
TEST_SINGLE(inch(ZReg::z30, PredicatePattern::SVE_ALL , 16), "inch z30.h, all, mul #16");

TEST_SINGLE(dech(ZReg::z30, PredicatePattern::SVE_POW2 , 1), "dech z30.h, pow2");
TEST_SINGLE(dech(ZReg::z30, PredicatePattern::SVE_VL256, 7), "dech z30.h, vl256, mul #7");
TEST_SINGLE(dech(ZReg::z30, PredicatePattern::SVE_ALL , 16), "dech z30.h, all, mul #16");

TEST_SINGLE(incw(ZReg::z30, PredicatePattern::SVE_POW2 , 1), "incw z30.s, pow2");
TEST_SINGLE(incw(ZReg::z30, PredicatePattern::SVE_VL256, 7), "incw z30.s, vl256, mul #7");
TEST_SINGLE(incw(ZReg::z30, PredicatePattern::SVE_ALL , 16), "incw z30.s, all, mul #16");

TEST_SINGLE(decw(ZReg::z30, PredicatePattern::SVE_POW2 , 1), "decw z30.s, pow2");
TEST_SINGLE(decw(ZReg::z30, PredicatePattern::SVE_VL256, 7), "decw z30.s, vl256, mul #7");
TEST_SINGLE(decw(ZReg::z30, PredicatePattern::SVE_ALL , 16), "decw z30.s, all, mul #16");

TEST_SINGLE(incd(ZReg::z30, PredicatePattern::SVE_POW2 , 1), "incd z30.d, pow2");
TEST_SINGLE(incd(ZReg::z30, PredicatePattern::SVE_VL256, 7), "incd z30.d, vl256, mul #7");
TEST_SINGLE(incd(ZReg::z30, PredicatePattern::SVE_ALL , 16), "incd z30.d, all, mul #16");

TEST_SINGLE(decd(ZReg::z30, PredicatePattern::SVE_POW2 , 1), "decd z30.d, pow2");
TEST_SINGLE(decd(ZReg::z30, PredicatePattern::SVE_VL256, 7), "decd z30.d, vl256, mul #7");
TEST_SINGLE(decd(ZReg::z30, PredicatePattern::SVE_ALL , 16), "decd z30.d, all, mul #16");
Expand All @@ -1203,31 +1203,31 @@ TEST_CASE_METHOD(TestDisassembler, "Emitter: SVE: SVE inc/dec register by elemen
TEST_SINGLE(incb(XReg::x30, PredicatePattern::SVE_POW2 , 1), "incb x30, pow2");
TEST_SINGLE(incb(XReg::x30, PredicatePattern::SVE_VL256, 7), "incb x30, vl256, mul #7");
TEST_SINGLE(incb(XReg::x30, PredicatePattern::SVE_ALL , 16), "incb x30, all, mul #16");

TEST_SINGLE(decb(XReg::x30, PredicatePattern::SVE_POW2 , 1), "decb x30, pow2");
TEST_SINGLE(decb(XReg::x30, PredicatePattern::SVE_VL256, 7), "decb x30, vl256, mul #7");
TEST_SINGLE(decb(XReg::x30, PredicatePattern::SVE_ALL , 16), "decb x30, all, mul #16");

TEST_SINGLE(inch(XReg::x30, PredicatePattern::SVE_POW2 , 1), "inch x30, pow2");
TEST_SINGLE(inch(XReg::x30, PredicatePattern::SVE_VL256, 7), "inch x30, vl256, mul #7");
TEST_SINGLE(inch(XReg::x30, PredicatePattern::SVE_ALL , 16), "inch x30, all, mul #16");

TEST_SINGLE(dech(XReg::x30, PredicatePattern::SVE_POW2 , 1), "dech x30, pow2");
TEST_SINGLE(dech(XReg::x30, PredicatePattern::SVE_VL256, 7), "dech x30, vl256, mul #7");
TEST_SINGLE(dech(XReg::x30, PredicatePattern::SVE_ALL , 16), "dech x30, all, mul #16");

TEST_SINGLE(incw(XReg::x30, PredicatePattern::SVE_POW2 , 1), "incw x30, pow2");
TEST_SINGLE(incw(XReg::x30, PredicatePattern::SVE_VL256, 7), "incw x30, vl256, mul #7");
TEST_SINGLE(incw(XReg::x30, PredicatePattern::SVE_ALL , 16), "incw x30, all, mul #16");

TEST_SINGLE(decw(XReg::x30, PredicatePattern::SVE_POW2 , 1), "decw x30, pow2");
TEST_SINGLE(decw(XReg::x30, PredicatePattern::SVE_VL256, 7), "decw x30, vl256, mul #7");
TEST_SINGLE(decw(XReg::x30, PredicatePattern::SVE_ALL , 16), "decw x30, all, mul #16");

TEST_SINGLE(incd(XReg::x30, PredicatePattern::SVE_POW2 , 1), "incd x30, pow2");
TEST_SINGLE(incd(XReg::x30, PredicatePattern::SVE_VL256, 7), "incd x30, vl256, mul #7");
TEST_SINGLE(incd(XReg::x30, PredicatePattern::SVE_ALL , 16), "incd x30, all, mul #16");

TEST_SINGLE(decd(XReg::x30, PredicatePattern::SVE_POW2 , 1), "decd x30, pow2");
TEST_SINGLE(decd(XReg::x30, PredicatePattern::SVE_VL256, 7), "decd x30, vl256, mul #7");
TEST_SINGLE(decd(XReg::x30, PredicatePattern::SVE_ALL , 16), "decd x30, all, mul #16");
Expand Down Expand Up @@ -1507,7 +1507,7 @@ TEST_CASE_METHOD(TestDisassembler, "Emitter: SVE: SVE Permute Predicate") {
TEST_SINGLE(rev(SubRegSize::i16Bit, PReg::p15, PReg::p14), "rev p15.h, p14.h");
TEST_SINGLE(rev(SubRegSize::i32Bit, PReg::p15, PReg::p14), "rev p15.s, p14.s");
TEST_SINGLE(rev(SubRegSize::i64Bit, PReg::p15, PReg::p14), "rev p15.d, p14.d");

TEST_SINGLE(punpklo(PReg::p15, PReg::p14), "punpklo p15.h, p14.b");
TEST_SINGLE(punpkhi(PReg::p15, PReg::p14), "punpkhi p15.h, p14.b");

Expand Down Expand Up @@ -3469,15 +3469,15 @@ TEST_CASE_METHOD(TestDisassembler, "Emitter: SVE: SVE floating-point multiply-ad
// TEST_SINGLE(bfmlalb(SubRegSize::i32Bit, ZReg::z30, ZReg::z29, ZReg::z28), "bfmlalb z30.s, z29.h, z28.h");
// TEST_SINGLE(bfmlalb(SubRegSize::i32Bit, ZReg::z30, ZReg::z29, ZReg::z28), "bfmlalb z30.s, z29.h, z28.h");
// TEST_SINGLE(bfmlalb(SubRegSize::i32Bit, ZReg::z30, ZReg::z29, ZReg::z28), "bfmlalb z30.s, z29.h, z28.h");

// TEST_SINGLE(bfmlalt(SubRegSize::i32Bit, ZReg::z30, ZReg::z29, ZReg::z28), "bfmlalt z30.s, z29.h, z28.h");
// TEST_SINGLE(bfmlalt(SubRegSize::i32Bit, ZReg::z30, ZReg::z29, ZReg::z28), "bfmlalt z30.s, z29.h, z28.h");
// TEST_SINGLE(bfmlalt(SubRegSize::i32Bit, ZReg::z30, ZReg::z29, ZReg::z28), "bfmlalt z30.s, z29.h, z28.h");

// TEST_SINGLE(bfmlalb(SubRegSize::i32Bit, ZReg::z30, ZReg::z29, ZReg::z28), "bfmlslb z30.s, z29.h, z28.h");
// TEST_SINGLE(bfmlalb(SubRegSize::i32Bit, ZReg::z30, ZReg::z29, ZReg::z28), "bfmlslb z30.s, z29.h, z28.h");
// TEST_SINGLE(bfmlalb(SubRegSize::i32Bit, ZReg::z30, ZReg::z29, ZReg::z28), "bfmlslb z30.s, z29.h, z28.h");

// TEST_SINGLE(bfmlslt(SubRegSize::i32Bit, ZReg::z30, ZReg::z29, ZReg::z28), "bfmlslt z30.s, z29.h, z28.h");
// TEST_SINGLE(bfmlslt(SubRegSize::i32Bit, ZReg::z30, ZReg::z29, ZReg::z28), "bfmlslt z30.s, z29.h, z28.h");
// TEST_SINGLE(bfmlslt(SubRegSize::i32Bit, ZReg::z30, ZReg::z29, ZReg::z28), "bfmlslt z30.s, z29.h, z28.h");
Expand Down
2 changes: 1 addition & 1 deletion FEXCore/unittests/Emitter/Scalar_Tests.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
#include "TestDisassembler.h"

#include <catch2/catch.hpp>
#include <catch2/catch_test_macros.hpp>
#include <fcntl.h>

using namespace FEXCore::ARMEmitter;
Expand Down
2 changes: 1 addition & 1 deletion FEXCore/unittests/Emitter/System_Tests.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
#include "TestDisassembler.h"

#include <catch2/catch.hpp>
#include <catch2/catch_test_macros.hpp>
#include <fcntl.h>

using namespace FEXCore::ARMEmitter;
Expand Down
3 changes: 2 additions & 1 deletion unittests/APITests/Filesystem.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -1,4 +1,5 @@
#include <catch2/catch.hpp>
#include <catch2/catch_test_macros.hpp>
#include <catch2/generators/catch_generators.hpp>
#include <filesystem>
#include <FEXHeaderUtils/Filesystem.h>

Expand Down
2 changes: 1 addition & 1 deletion unittests/APITests/InterruptableConditionVariable.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
#include <catch2/catch.hpp>
#include <catch2/catch_test_macros.hpp>
#include <chrono>
#include <csetjmp>
#include <FEXCore/Utils/InterruptableConditionVariable.h>
Expand Down
2 changes: 1 addition & 1 deletion unittests/FEXLinuxTests/tests/fd/test_close_range.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
#include <catch2/catch.hpp>
#include <catch2/catch_test_macros.hpp>

#include <cstdint>
#include <unistd.h>
Expand Down
2 changes: 1 addition & 1 deletion unittests/FEXLinuxTests/tests/signal/Syscall_state.32.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
#include <catch2/catch.hpp>
#include <catch2/catch_test_macros.hpp>
#include <csetjmp>
#include <unistd.h>
#include <sys/syscall.h>
Expand Down
2 changes: 1 addition & 1 deletion unittests/FEXLinuxTests/tests/signal/Syscall_state.64.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
#include <catch2/catch.hpp>
#include <catch2/catch_test_macros.hpp>
#include <csetjmp>
#include <unistd.h>
#include <sys/syscall.h>
Expand Down
9 changes: 5 additions & 4 deletions unittests/FEXLinuxTests/tests/signal/eflags_signal.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -1,11 +1,12 @@
#include <atomic>
#include <catch2/catch.hpp>
#include <catch2/catch_test_macros.hpp>
#include <fstream>
#include <sys/syscall.h>
#include <linux/futex.h>
#include <signal.h>
#include <functional>
#include <optional>
#include <signal.h>
#include <thread>
#include <sys/syscall.h>
#include <linux/futex.h>

#if __SIZEOF_POINTER__ == 4
#define DO_ASM(x, y) \
Expand Down
2 changes: 1 addition & 1 deletion unittests/FEXLinuxTests/tests/signal/invalid_hlt.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
#include "invalid_util.h"

#include <catch2/catch.hpp>
#include <catch2/catch_test_macros.hpp>

#include <atomic>
#include <signal.h>
Expand Down
2 changes: 1 addition & 1 deletion unittests/FEXLinuxTests/tests/signal/invalid_int.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
#include "invalid_util.h"

#include <catch2/catch.hpp>
#include <catch2/catch_test_macros.hpp>

#include <atomic>
#include <signal.h>
Expand Down
2 changes: 1 addition & 1 deletion unittests/FEXLinuxTests/tests/signal/invalid_int1.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
#include "invalid_util.h"

#include <catch2/catch.hpp>
#include <catch2/catch_test_macros.hpp>

#include <atomic>
#include <signal.h>
Expand Down
2 changes: 1 addition & 1 deletion unittests/FEXLinuxTests/tests/signal/invalid_int3.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
#include "invalid_util.h"

#include <catch2/catch.hpp>
#include <catch2/catch_test_macros.hpp>

#include <atomic>
#include <signal.h>
Expand Down
2 changes: 1 addition & 1 deletion unittests/FEXLinuxTests/tests/signal/invalid_ud2.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
#include "invalid_util.h"

#include <catch2/catch.hpp>
#include <catch2/catch_test_macros.hpp>

#include <atomic>
#include <signal.h>
Expand Down
2 changes: 1 addition & 1 deletion unittests/FEXLinuxTests/tests/signal/pthread_cancel.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
#include <catch2/catch.hpp>
#include <catch2/catch_test_macros.hpp>

#include <atomic>
#include <errno.h>
Expand Down
2 changes: 1 addition & 1 deletion unittests/FEXLinuxTests/tests/signal/signal_flags.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
#include "invalid_util.h"

#include <catch2/catch.hpp>
#include <catch2/catch_test_macros.hpp>

#include <atomic>
#include <signal.h>
Expand Down
2 changes: 1 addition & 1 deletion unittests/FEXLinuxTests/tests/signal/sigtest_no_defer.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
#include <catch2/catch.hpp>
#include <catch2/catch_test_macros.hpp>

#include <signal.h>
#include <stdio.h>
Expand Down
2 changes: 1 addition & 1 deletion unittests/FEXLinuxTests/tests/signal/sigtest_samask.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
#include <catch2/catch.hpp>
#include <catch2/catch_test_macros.hpp>

#include <signal.h>
#include <stdio.h>
Expand Down
2 changes: 1 addition & 1 deletion unittests/FEXLinuxTests/tests/signal/sigtest_siginfo.32.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
#include "invalid_util.h"

#include <catch2/catch.hpp>
#include <catch2/catch_test_macros.hpp>

#include <signal.h>
#include <stdio.h>
Expand Down
2 changes: 1 addition & 1 deletion unittests/FEXLinuxTests/tests/signal/sigtest_siginfo.64.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
#include "invalid_util.h"

#include <catch2/catch.hpp>
#include <catch2/catch_test_macros.hpp>

#include <signal.h>
#include <stdio.h>
Expand Down
2 changes: 1 addition & 1 deletion unittests/FEXLinuxTests/tests/signal/sigtest_sigmask.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
#include <catch2/catch.hpp>
#include <catch2/catch_test_macros.hpp>

#include <signal.h>
#include <stdio.h>
Expand Down
3 changes: 2 additions & 1 deletion unittests/FEXLinuxTests/tests/signal/synchronous-signal-block.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -19,7 +19,8 @@
#include <sys/wait.h>
#include <unistd.h>

#include <catch2/catch.hpp>
#include <catch2/catch_test_macros.hpp>
#include <catch2/generators/catch_generators.hpp>

static jmp_buf jmpbuf;

Expand Down
2 changes: 1 addition & 1 deletion unittests/FEXLinuxTests/tests/signal/timer-sigev-thread.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
// Simple test of timer_create + SIGEV_THREAD, glibc implements it via SIG32

#include <catch2/catch.hpp>
#include <catch2/catch_test_macros.hpp>

#include <stdio.h>
#include <stdlib.h>
Expand Down
2 changes: 1 addition & 1 deletion unittests/FEXLinuxTests/tests/smc/smc-1-dynamic.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -13,7 +13,7 @@ char text_sym[16384] __attribute__((section(".text")));

#include "smc-common.h"

#include <catch2/catch.hpp>
#include <catch2/catch_test_macros.hpp>

TEST_CASE("SMC: Changes in stack") {
// stack, depends on -z execstack or mprotect
Expand Down
2 changes: 1 addition & 1 deletion unittests/FEXLinuxTests/tests/smc/smc-2.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -4,7 +4,7 @@

#include "smc-common.h"

#include <catch2/catch.hpp>
#include <catch2/catch_test_macros.hpp>

TEST_CASE("SMC: mmap") {
auto code = (char *)mmap(0, 4096, PROT_READ | PROT_WRITE | PROT_EXEC, MAP_PRIVATE | MAP_ANON, 0, 0);
Expand Down
4 changes: 2 additions & 2 deletions unittests/FEXLinuxTests/tests/smc/smc-mt-1.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -3,15 +3,15 @@

creates 10 threads
each thread does an smc test 10 times

*/
#include <cstdio>
#include <pthread.h>
#include <sys/mman.h>

#include <atomic>

#include <catch2/catch.hpp>
#include <catch2/catch_test_macros.hpp>

std::atomic<int> result;
std::atomic<bool> go;
Expand Down
2 changes: 1 addition & 1 deletion unittests/FEXLinuxTests/tests/smc/smc-mt-2.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -28,7 +28,7 @@

#include <atomic>

#include <catch2/catch.hpp>
#include <catch2/catch_test_macros.hpp>

std::atomic<bool> ready_for_modification;
std::atomic<bool> waiting_for_modification;
Expand Down
2 changes: 1 addition & 1 deletion unittests/FEXLinuxTests/tests/smc/smc-shared-1.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -4,7 +4,7 @@

#include "smc-common.h"

#include <catch2/catch.hpp>
#include <catch2/catch_test_macros.hpp>

TEST_CASE("SMC: mmap_mremap") {
auto code = (char *)mmap(0, 4096, PROT_READ | PROT_WRITE | PROT_EXEC, MAP_SHARED | MAP_ANON, 0, 0);
Expand Down
2 changes: 1 addition & 1 deletion unittests/FEXLinuxTests/tests/smc/smc-shared-2.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -5,7 +5,7 @@

#include "smc-common.h"

#include <catch2/catch.hpp>
#include <catch2/catch_test_macros.hpp>

TEST_CASE("SMC: mmap_fork") {
auto code = (char *)mmap(0, 4096, PROT_READ | PROT_WRITE | PROT_EXEC, MAP_SHARED | MAP_ANON, 0, 0);
Expand Down
Loading
Loading