Merge pull request #3484 from neobrain/feature_catch2_v3

Externals: Update Catch2 to v3.5.3
FEX-Emu · Mar 5, 2024 · b892da7 · b892da7
2 parents ee56a2c + 6edba49
commit b892da7
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Showing 42 changed files with 75 additions and 69 deletions.
diff --git a/External/Catch2 b/External/Catch2
diff --git a/FEXCore/unittests/APITests/FileLoading.cpp b/FEXCore/unittests/APITests/FileLoading.cpp
@@ -1,5 +1,5 @@
 #include <FEXCore/Utils/FileLoading.h>
-#include <catch2/catch.hpp>
+#include <catch2/catch_test_macros.hpp>
 
 TEST_CASE("LoadFile-Doesn'tExist") {
   fextl::string MapsFile;

diff --git a/FEXCore/unittests/APITests/FutexSpinTest.cpp b/FEXCore/unittests/APITests/FutexSpinTest.cpp
@@ -1,5 +1,5 @@
 #include "Utils/SpinWaitLock.h"
-#include <catch2/catch.hpp>
+#include <catch2/catch_test_macros.hpp>
 #include <chrono>
 #include <thread>
 

diff --git a/FEXCore/unittests/APITests/ILog2.cpp b/FEXCore/unittests/APITests/ILog2.cpp
@@ -1,5 +1,6 @@
 #include <FEXCore/Utils/MathUtils.h>
-#include <catch2/catch.hpp>
+#include <catch2/catch_test_macros.hpp>
+#include <catch2/generators/catch_generators_range.hpp>
 
 TEST_CASE("ILog2") {
   auto i = GENERATE(range(0, 64));

diff --git a/FEXCore/unittests/Emitter/ALU_Tests.cpp b/FEXCore/unittests/Emitter/ALU_Tests.cpp
@@ -1,6 +1,6 @@
 #include "TestDisassembler.h"
 
-#include <catch2/catch.hpp>
+#include <catch2/catch_test_macros.hpp>
 #include <fcntl.h>
 
 using namespace FEXCore::ARMEmitter;
@@ -450,7 +450,7 @@ TEST_CASE_METHOD(TestDisassembler, "Emitter: ALU: Bitfield") {
 
   TEST_SINGLE(bfxil(Size::i32Bit, Reg::r29, Reg::r28, 4, 3),  "bfxil w29, w28, #4, #3");
   TEST_SINGLE(bfxil(Size::i32Bit, Reg::r29, Reg::r28, 27, 3), "bfxil w29, w28, #27, #3");
-  
+
   TEST_SINGLE(bfxil(Size::i64Bit, Reg::r29, Reg::r28, 4, 3),  "bfxil x29, x28, #4, #3");
   TEST_SINGLE(bfxil(Size::i64Bit, Reg::r29, Reg::r28, 57, 3), "bfxil x29, x28, #57, #3");
 

diff --git a/FEXCore/unittests/Emitter/ASIMD_Tests.cpp b/FEXCore/unittests/Emitter/ASIMD_Tests.cpp
@@ -1,6 +1,6 @@
 #include "TestDisassembler.h"
 
-#include <catch2/catch.hpp>
+#include <catch2/catch_test_macros.hpp>
 #include <fcntl.h>
 
 using namespace FEXCore::ARMEmitter;

diff --git a/FEXCore/unittests/Emitter/Branch_Tests.cpp b/FEXCore/unittests/Emitter/Branch_Tests.cpp
@@ -1,6 +1,6 @@
 #include "TestDisassembler.h"
 
-#include <catch2/catch.hpp>
+#include <catch2/catch_test_macros.hpp>
 #include <fcntl.h>
 
 using namespace FEXCore::ARMEmitter;

diff --git a/FEXCore/unittests/Emitter/Loadstore_Tests.cpp b/FEXCore/unittests/Emitter/Loadstore_Tests.cpp
@@ -1,6 +1,6 @@
 #include "TestDisassembler.h"
 
-#include <catch2/catch.hpp>
+#include <catch2/catch_test_macros.hpp>
 #include <fcntl.h>
 
 using namespace FEXCore::ARMEmitter;

diff --git a/FEXCore/unittests/Emitter/SVE_Tests.cpp b/FEXCore/unittests/Emitter/SVE_Tests.cpp
@@ -1,6 +1,6 @@
 #include "TestDisassembler.h"
 
-#include <catch2/catch.hpp>
+#include <catch2/catch_test_macros.hpp>
 #include <fcntl.h>
 
 using namespace FEXCore::ARMEmitter;
@@ -1177,23 +1177,23 @@ TEST_CASE_METHOD(TestDisassembler, "Emitter: SVE: SVE inc/dec vector by element
   TEST_SINGLE(inch(ZReg::z30, PredicatePattern::SVE_POW2 , 1),  "inch z30.h, pow2");
   TEST_SINGLE(inch(ZReg::z30, PredicatePattern::SVE_VL256, 7),  "inch z30.h, vl256, mul #7");
   TEST_SINGLE(inch(ZReg::z30, PredicatePattern::SVE_ALL  , 16), "inch z30.h, all, mul #16");
-  
+
   TEST_SINGLE(dech(ZReg::z30, PredicatePattern::SVE_POW2 , 1),  "dech z30.h, pow2");
   TEST_SINGLE(dech(ZReg::z30, PredicatePattern::SVE_VL256, 7),  "dech z30.h, vl256, mul #7");
   TEST_SINGLE(dech(ZReg::z30, PredicatePattern::SVE_ALL  , 16), "dech z30.h, all, mul #16");
 
   TEST_SINGLE(incw(ZReg::z30, PredicatePattern::SVE_POW2 , 1),  "incw z30.s, pow2");
   TEST_SINGLE(incw(ZReg::z30, PredicatePattern::SVE_VL256, 7),  "incw z30.s, vl256, mul #7");
   TEST_SINGLE(incw(ZReg::z30, PredicatePattern::SVE_ALL  , 16), "incw z30.s, all, mul #16");
-  
+
   TEST_SINGLE(decw(ZReg::z30, PredicatePattern::SVE_POW2 , 1),  "decw z30.s, pow2");
   TEST_SINGLE(decw(ZReg::z30, PredicatePattern::SVE_VL256, 7),  "decw z30.s, vl256, mul #7");
   TEST_SINGLE(decw(ZReg::z30, PredicatePattern::SVE_ALL  , 16), "decw z30.s, all, mul #16");
 
   TEST_SINGLE(incd(ZReg::z30, PredicatePattern::SVE_POW2 , 1),  "incd z30.d, pow2");
   TEST_SINGLE(incd(ZReg::z30, PredicatePattern::SVE_VL256, 7),  "incd z30.d, vl256, mul #7");
   TEST_SINGLE(incd(ZReg::z30, PredicatePattern::SVE_ALL  , 16), "incd z30.d, all, mul #16");
-  
+
   TEST_SINGLE(decd(ZReg::z30, PredicatePattern::SVE_POW2 , 1),  "decd z30.d, pow2");
   TEST_SINGLE(decd(ZReg::z30, PredicatePattern::SVE_VL256, 7),  "decd z30.d, vl256, mul #7");
   TEST_SINGLE(decd(ZReg::z30, PredicatePattern::SVE_ALL  , 16), "decd z30.d, all, mul #16");
@@ -1203,31 +1203,31 @@ TEST_CASE_METHOD(TestDisassembler, "Emitter: SVE: SVE inc/dec register by elemen
   TEST_SINGLE(incb(XReg::x30, PredicatePattern::SVE_POW2 , 1),  "incb x30, pow2");
   TEST_SINGLE(incb(XReg::x30, PredicatePattern::SVE_VL256, 7),  "incb x30, vl256, mul #7");
   TEST_SINGLE(incb(XReg::x30, PredicatePattern::SVE_ALL  , 16), "incb x30, all, mul #16");
-  
+
   TEST_SINGLE(decb(XReg::x30, PredicatePattern::SVE_POW2 , 1),  "decb x30, pow2");
   TEST_SINGLE(decb(XReg::x30, PredicatePattern::SVE_VL256, 7),  "decb x30, vl256, mul #7");
   TEST_SINGLE(decb(XReg::x30, PredicatePattern::SVE_ALL  , 16), "decb x30, all, mul #16");
 
   TEST_SINGLE(inch(XReg::x30, PredicatePattern::SVE_POW2 , 1),  "inch x30, pow2");
   TEST_SINGLE(inch(XReg::x30, PredicatePattern::SVE_VL256, 7),  "inch x30, vl256, mul #7");
   TEST_SINGLE(inch(XReg::x30, PredicatePattern::SVE_ALL  , 16), "inch x30, all, mul #16");
-  
+
   TEST_SINGLE(dech(XReg::x30, PredicatePattern::SVE_POW2 , 1),  "dech x30, pow2");
   TEST_SINGLE(dech(XReg::x30, PredicatePattern::SVE_VL256, 7),  "dech x30, vl256, mul #7");
   TEST_SINGLE(dech(XReg::x30, PredicatePattern::SVE_ALL  , 16), "dech x30, all, mul #16");
 
   TEST_SINGLE(incw(XReg::x30, PredicatePattern::SVE_POW2 , 1),  "incw x30, pow2");
   TEST_SINGLE(incw(XReg::x30, PredicatePattern::SVE_VL256, 7),  "incw x30, vl256, mul #7");
   TEST_SINGLE(incw(XReg::x30, PredicatePattern::SVE_ALL  , 16), "incw x30, all, mul #16");
-  
+
   TEST_SINGLE(decw(XReg::x30, PredicatePattern::SVE_POW2 , 1),  "decw x30, pow2");
   TEST_SINGLE(decw(XReg::x30, PredicatePattern::SVE_VL256, 7),  "decw x30, vl256, mul #7");
   TEST_SINGLE(decw(XReg::x30, PredicatePattern::SVE_ALL  , 16), "decw x30, all, mul #16");
 
   TEST_SINGLE(incd(XReg::x30, PredicatePattern::SVE_POW2 , 1),  "incd x30, pow2");
   TEST_SINGLE(incd(XReg::x30, PredicatePattern::SVE_VL256, 7),  "incd x30, vl256, mul #7");
   TEST_SINGLE(incd(XReg::x30, PredicatePattern::SVE_ALL  , 16), "incd x30, all, mul #16");
-  
+
   TEST_SINGLE(decd(XReg::x30, PredicatePattern::SVE_POW2 , 1),  "decd x30, pow2");
   TEST_SINGLE(decd(XReg::x30, PredicatePattern::SVE_VL256, 7),  "decd x30, vl256, mul #7");
   TEST_SINGLE(decd(XReg::x30, PredicatePattern::SVE_ALL  , 16), "decd x30, all, mul #16");
@@ -1507,7 +1507,7 @@ TEST_CASE_METHOD(TestDisassembler, "Emitter: SVE: SVE Permute Predicate") {
   TEST_SINGLE(rev(SubRegSize::i16Bit, PReg::p15, PReg::p14), "rev p15.h, p14.h");
   TEST_SINGLE(rev(SubRegSize::i32Bit, PReg::p15, PReg::p14), "rev p15.s, p14.s");
   TEST_SINGLE(rev(SubRegSize::i64Bit, PReg::p15, PReg::p14), "rev p15.d, p14.d");
-  
+
   TEST_SINGLE(punpklo(PReg::p15, PReg::p14), "punpklo p15.h, p14.b");
   TEST_SINGLE(punpkhi(PReg::p15, PReg::p14), "punpkhi p15.h, p14.b");
 
@@ -3469,15 +3469,15 @@ TEST_CASE_METHOD(TestDisassembler, "Emitter: SVE: SVE floating-point multiply-ad
   // TEST_SINGLE(bfmlalb(SubRegSize::i32Bit, ZReg::z30, ZReg::z29, ZReg::z28), "bfmlalb z30.s, z29.h, z28.h");
   // TEST_SINGLE(bfmlalb(SubRegSize::i32Bit, ZReg::z30, ZReg::z29, ZReg::z28), "bfmlalb z30.s, z29.h, z28.h");
   // TEST_SINGLE(bfmlalb(SubRegSize::i32Bit, ZReg::z30, ZReg::z29, ZReg::z28), "bfmlalb z30.s, z29.h, z28.h");
-  
+
   // TEST_SINGLE(bfmlalt(SubRegSize::i32Bit, ZReg::z30, ZReg::z29, ZReg::z28), "bfmlalt z30.s, z29.h, z28.h");
   // TEST_SINGLE(bfmlalt(SubRegSize::i32Bit, ZReg::z30, ZReg::z29, ZReg::z28), "bfmlalt z30.s, z29.h, z28.h");
   // TEST_SINGLE(bfmlalt(SubRegSize::i32Bit, ZReg::z30, ZReg::z29, ZReg::z28), "bfmlalt z30.s, z29.h, z28.h");
-  
+
   // TEST_SINGLE(bfmlalb(SubRegSize::i32Bit, ZReg::z30, ZReg::z29, ZReg::z28), "bfmlslb z30.s, z29.h, z28.h");
   // TEST_SINGLE(bfmlalb(SubRegSize::i32Bit, ZReg::z30, ZReg::z29, ZReg::z28), "bfmlslb z30.s, z29.h, z28.h");
   // TEST_SINGLE(bfmlalb(SubRegSize::i32Bit, ZReg::z30, ZReg::z29, ZReg::z28), "bfmlslb z30.s, z29.h, z28.h");
-  
+
   // TEST_SINGLE(bfmlslt(SubRegSize::i32Bit, ZReg::z30, ZReg::z29, ZReg::z28), "bfmlslt z30.s, z29.h, z28.h");
   // TEST_SINGLE(bfmlslt(SubRegSize::i32Bit, ZReg::z30, ZReg::z29, ZReg::z28), "bfmlslt z30.s, z29.h, z28.h");
   // TEST_SINGLE(bfmlslt(SubRegSize::i32Bit, ZReg::z30, ZReg::z29, ZReg::z28), "bfmlslt z30.s, z29.h, z28.h");

diff --git a/FEXCore/unittests/Emitter/Scalar_Tests.cpp b/FEXCore/unittests/Emitter/Scalar_Tests.cpp
@@ -1,6 +1,6 @@
 #include "TestDisassembler.h"
 
-#include <catch2/catch.hpp>
+#include <catch2/catch_test_macros.hpp>
 #include <fcntl.h>
 
 using namespace FEXCore::ARMEmitter;

diff --git a/FEXCore/unittests/Emitter/System_Tests.cpp b/FEXCore/unittests/Emitter/System_Tests.cpp
@@ -1,6 +1,6 @@
 #include "TestDisassembler.h"
 
-#include <catch2/catch.hpp>
+#include <catch2/catch_test_macros.hpp>
 #include <fcntl.h>
 
 using namespace FEXCore::ARMEmitter;

diff --git a/unittests/APITests/Filesystem.cpp b/unittests/APITests/Filesystem.cpp
@@ -1,4 +1,5 @@
-#include <catch2/catch.hpp>
+#include <catch2/catch_test_macros.hpp>
+#include <catch2/generators/catch_generators.hpp>
 #include <filesystem>
 #include <FEXHeaderUtils/Filesystem.h>
 

diff --git a/unittests/APITests/InterruptableConditionVariable.cpp b/unittests/APITests/InterruptableConditionVariable.cpp
@@ -1,4 +1,4 @@
-#include <catch2/catch.hpp>
+#include <catch2/catch_test_macros.hpp>
 #include <chrono>
 #include <csetjmp>
 #include <FEXCore/Utils/InterruptableConditionVariable.h>

diff --git a/unittests/FEXLinuxTests/tests/fd/test_close_range.cpp b/unittests/FEXLinuxTests/tests/fd/test_close_range.cpp
@@ -1,4 +1,4 @@
-#include <catch2/catch.hpp>
+#include <catch2/catch_test_macros.hpp>
 
 #include <cstdint>
 #include <unistd.h>

diff --git a/unittests/FEXLinuxTests/tests/signal/Syscall_state.32.cpp b/unittests/FEXLinuxTests/tests/signal/Syscall_state.32.cpp
@@ -1,4 +1,4 @@
-#include <catch2/catch.hpp>
+#include <catch2/catch_test_macros.hpp>
 #include <csetjmp>
 #include <unistd.h>
 #include <sys/syscall.h>

diff --git a/unittests/FEXLinuxTests/tests/signal/Syscall_state.64.cpp b/unittests/FEXLinuxTests/tests/signal/Syscall_state.64.cpp
@@ -1,4 +1,4 @@
-#include <catch2/catch.hpp>
+#include <catch2/catch_test_macros.hpp>
 #include <csetjmp>
 #include <unistd.h>
 #include <sys/syscall.h>

diff --git a/unittests/FEXLinuxTests/tests/signal/eflags_signal.cpp b/unittests/FEXLinuxTests/tests/signal/eflags_signal.cpp
@@ -1,11 +1,12 @@
 #include <atomic>
-#include <catch2/catch.hpp>
+#include <catch2/catch_test_macros.hpp>
 #include <fstream>
-#include <sys/syscall.h>
-#include <linux/futex.h>
-#include <signal.h>
+#include <functional>
 #include <optional>
+#include <signal.h>
 #include <thread>
+#include <sys/syscall.h>
+#include <linux/futex.h>
 
 #if __SIZEOF_POINTER__ == 4
 #define DO_ASM(x, y) \

diff --git a/unittests/FEXLinuxTests/tests/signal/invalid_hlt.cpp b/unittests/FEXLinuxTests/tests/signal/invalid_hlt.cpp
@@ -1,6 +1,6 @@
 #include "invalid_util.h"
 
-#include <catch2/catch.hpp>
+#include <catch2/catch_test_macros.hpp>
 
 #include <atomic>
 #include <signal.h>

diff --git a/unittests/FEXLinuxTests/tests/signal/invalid_int.cpp b/unittests/FEXLinuxTests/tests/signal/invalid_int.cpp
@@ -1,6 +1,6 @@
 #include "invalid_util.h"
 
-#include <catch2/catch.hpp>
+#include <catch2/catch_test_macros.hpp>
 
 #include <atomic>
 #include <signal.h>

diff --git a/unittests/FEXLinuxTests/tests/signal/invalid_int1.cpp b/unittests/FEXLinuxTests/tests/signal/invalid_int1.cpp
@@ -1,6 +1,6 @@
 #include "invalid_util.h"
 
-#include <catch2/catch.hpp>
+#include <catch2/catch_test_macros.hpp>
 
 #include <atomic>
 #include <signal.h>

diff --git a/unittests/FEXLinuxTests/tests/signal/invalid_int3.cpp b/unittests/FEXLinuxTests/tests/signal/invalid_int3.cpp
@@ -1,6 +1,6 @@
 #include "invalid_util.h"
 
-#include <catch2/catch.hpp>
+#include <catch2/catch_test_macros.hpp>
 
 #include <atomic>
 #include <signal.h>

diff --git a/unittests/FEXLinuxTests/tests/signal/invalid_ud2.cpp b/unittests/FEXLinuxTests/tests/signal/invalid_ud2.cpp
@@ -1,6 +1,6 @@
 #include "invalid_util.h"
 
-#include <catch2/catch.hpp>
+#include <catch2/catch_test_macros.hpp>
 
 #include <atomic>
 #include <signal.h>

diff --git a/unittests/FEXLinuxTests/tests/signal/pthread_cancel.cpp b/unittests/FEXLinuxTests/tests/signal/pthread_cancel.cpp
@@ -1,4 +1,4 @@
-#include <catch2/catch.hpp>
+#include <catch2/catch_test_macros.hpp>
 
 #include <atomic>
 #include <errno.h>

diff --git a/unittests/FEXLinuxTests/tests/signal/signal_flags.cpp b/unittests/FEXLinuxTests/tests/signal/signal_flags.cpp
@@ -1,6 +1,6 @@
 #include "invalid_util.h"
 
-#include <catch2/catch.hpp>
+#include <catch2/catch_test_macros.hpp>
 
 #include <atomic>
 #include <signal.h>

diff --git a/unittests/FEXLinuxTests/tests/signal/sigtest_no_defer.cpp b/unittests/FEXLinuxTests/tests/signal/sigtest_no_defer.cpp
@@ -1,4 +1,4 @@
-#include <catch2/catch.hpp>
+#include <catch2/catch_test_macros.hpp>
 
 #include <signal.h>
 #include <stdio.h>

diff --git a/unittests/FEXLinuxTests/tests/signal/sigtest_samask.cpp b/unittests/FEXLinuxTests/tests/signal/sigtest_samask.cpp
@@ -1,4 +1,4 @@
-#include <catch2/catch.hpp>
+#include <catch2/catch_test_macros.hpp>
 
 #include <signal.h>
 #include <stdio.h>

diff --git a/unittests/FEXLinuxTests/tests/signal/sigtest_siginfo.32.cpp b/unittests/FEXLinuxTests/tests/signal/sigtest_siginfo.32.cpp
@@ -1,6 +1,6 @@
 #include "invalid_util.h"
 
-#include <catch2/catch.hpp>
+#include <catch2/catch_test_macros.hpp>
 
 #include <signal.h>
 #include <stdio.h>

diff --git a/unittests/FEXLinuxTests/tests/signal/sigtest_siginfo.64.cpp b/unittests/FEXLinuxTests/tests/signal/sigtest_siginfo.64.cpp
@@ -1,6 +1,6 @@
 #include "invalid_util.h"
 
-#include <catch2/catch.hpp>
+#include <catch2/catch_test_macros.hpp>
 
 #include <signal.h>
 #include <stdio.h>

diff --git a/unittests/FEXLinuxTests/tests/signal/sigtest_sigmask.cpp b/unittests/FEXLinuxTests/tests/signal/sigtest_sigmask.cpp
@@ -1,4 +1,4 @@
-#include <catch2/catch.hpp>
+#include <catch2/catch_test_macros.hpp>
 
 #include <signal.h>
 #include <stdio.h>

diff --git a/unittests/FEXLinuxTests/tests/signal/synchronous-signal-block.cpp b/unittests/FEXLinuxTests/tests/signal/synchronous-signal-block.cpp
@@ -19,7 +19,8 @@
 #include <sys/wait.h>
 #include <unistd.h>
 
-#include <catch2/catch.hpp>
+#include <catch2/catch_test_macros.hpp>
+#include <catch2/generators/catch_generators.hpp>
 
 static jmp_buf jmpbuf;
 

diff --git a/unittests/FEXLinuxTests/tests/signal/timer-sigev-thread.cpp b/unittests/FEXLinuxTests/tests/signal/timer-sigev-thread.cpp
@@ -1,6 +1,6 @@
 // Simple test of timer_create + SIGEV_THREAD, glibc implements it via SIG32
 
-#include <catch2/catch.hpp>
+#include <catch2/catch_test_macros.hpp>
 
 #include <stdio.h>
 #include <stdlib.h>

diff --git a/unittests/FEXLinuxTests/tests/smc/smc-1-dynamic.cpp b/unittests/FEXLinuxTests/tests/smc/smc-1-dynamic.cpp
@@ -13,7 +13,7 @@ char text_sym[16384] __attribute__((section(".text")));
 
 #include "smc-common.h"
 
-#include <catch2/catch.hpp>
+#include <catch2/catch_test_macros.hpp>
 
 TEST_CASE("SMC: Changes in stack") {
   // stack, depends on -z execstack or mprotect

diff --git a/unittests/FEXLinuxTests/tests/smc/smc-2.cpp b/unittests/FEXLinuxTests/tests/smc/smc-2.cpp
@@ -4,7 +4,7 @@
 
 #include "smc-common.h"
 
-#include <catch2/catch.hpp>
+#include <catch2/catch_test_macros.hpp>
 
 TEST_CASE("SMC: mmap") {
   auto code = (char *)mmap(0, 4096, PROT_READ | PROT_WRITE | PROT_EXEC, MAP_PRIVATE | MAP_ANON, 0, 0);

diff --git a/unittests/FEXLinuxTests/tests/smc/smc-mt-1.cpp b/unittests/FEXLinuxTests/tests/smc/smc-mt-1.cpp
@@ -3,15 +3,15 @@
 
   creates 10 threads
   each thread does an smc test 10 times
-  
+
 */
 #include <cstdio>
 #include <pthread.h>
 #include <sys/mman.h>
 
 #include <atomic>
 
-#include <catch2/catch.hpp>
+#include <catch2/catch_test_macros.hpp>
 
 std::atomic<int> result;
 std::atomic<bool> go;

diff --git a/unittests/FEXLinuxTests/tests/smc/smc-mt-2.cpp b/unittests/FEXLinuxTests/tests/smc/smc-mt-2.cpp
@@ -28,7 +28,7 @@
 
 #include <atomic>
 
-#include <catch2/catch.hpp>
+#include <catch2/catch_test_macros.hpp>
 
 std::atomic<bool> ready_for_modification;
 std::atomic<bool> waiting_for_modification;

diff --git a/unittests/FEXLinuxTests/tests/smc/smc-shared-1.cpp b/unittests/FEXLinuxTests/tests/smc/smc-shared-1.cpp
@@ -4,7 +4,7 @@
 
 #include "smc-common.h"
 
-#include <catch2/catch.hpp>
+#include <catch2/catch_test_macros.hpp>
 
 TEST_CASE("SMC: mmap_mremap") {
   auto code = (char *)mmap(0, 4096, PROT_READ | PROT_WRITE | PROT_EXEC, MAP_SHARED | MAP_ANON, 0, 0);

diff --git a/unittests/FEXLinuxTests/tests/smc/smc-shared-2.cpp b/unittests/FEXLinuxTests/tests/smc/smc-shared-2.cpp
@@ -5,7 +5,7 @@
 
 #include "smc-common.h"
 
-#include <catch2/catch.hpp>
+#include <catch2/catch_test_macros.hpp>
 
 TEST_CASE("SMC: mmap_fork") {
   auto code = (char *)mmap(0, 4096, PROT_READ | PROT_WRITE | PROT_EXEC, MAP_SHARED | MAP_ANON, 0, 0);