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InstCountCI: Update
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Signed-off-by: Alyssa Rosenzweig <[email protected]>
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@alyssarosenzweig
alyssarosenzweig committed Mar 31, 2024
1 parent 6885e23 commit 8548e1b
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Showing 2 changed files with 208 additions and 176 deletions.
176 changes: 96 additions & 80 deletions unittests/InstructionCountCI/FlagM/Primary.json
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Original file line number Diff line number Diff line change
Expand Up @@ -1950,153 +1950,169 @@
]
},
"repz cmpsb": {
"ExpectedInstructionCount": 13,
"ExpectedInstructionCount": 15,
"Comment": "0xa6",
"ExpectedArm64ASM": [
"ldrsb x20, [x28, #714]",
"cbz x5, #+0x30",
"ldrb w21, [x11]",
"ldrb w22, [x10]",
"eor w27, w22, w21",
"lsl w0, w22, #24",
"cmp w0, w21, lsl #24",
"sub w26, w22, w21",
"cfinv",
"sub x5, x5, #0x1 (1)",
"cbz x5, #+0x38",
"ldrb w26, [x11]",
"ldrb w27, [x10]",
"subs x5, x5, #0x1 (1)",
"add x11, x11, x20",
"add x10, x10, x20",
"b.eq #-0x2c"
"ccmp x27, x26, #nzcv, ne",
"b.eq #-0x1c",
"mov x20, x27",
"eor w27, w20, w26",
"lsl w0, w20, #24",
"cmp w0, w26, lsl #24",
"sub w26, w20, w26",
"cfinv"
]
},
"repz cmpsw": {
"ExpectedInstructionCount": 14,
"ExpectedInstructionCount": 16,
"Comment": "0xa7",
"ExpectedArm64ASM": [
"ldrsb x20, [x28, #714]",
"lsl x20, x20, #1",
"cbz x5, #+0x30",
"ldrh w21, [x11]",
"ldrh w22, [x10]",
"eor w27, w22, w21",
"lsl w0, w22, #16",
"cmp w0, w21, lsl #16",
"sub w26, w22, w21",
"cfinv",
"sub x5, x5, #0x1 (1)",
"cbz x5, #+0x38",
"ldrh w26, [x11]",
"ldrh w27, [x10]",
"subs x5, x5, #0x1 (1)",
"add x11, x11, x20",
"add x10, x10, x20",
"b.eq #-0x2c"
"ccmp x27, x26, #nzcv, ne",
"b.eq #-0x1c",
"mov x20, x27",
"eor w27, w20, w26",
"lsl w0, w20, #16",
"cmp w0, w26, lsl #16",
"sub w26, w20, w26",
"cfinv"
]
},
"repz cmpsd": {
"ExpectedInstructionCount": 12,
"ExpectedInstructionCount": 14,
"Comment": "0xa7",
"ExpectedArm64ASM": [
"ldrsb x20, [x28, #714]",
"lsl x20, x20, #2",
"cbz x5, #+0x28",
"ldr w21, [x11]",
"ldr w22, [x10]",
"eor w27, w22, w21",
"subs w26, w22, w21",
"cfinv",
"sub x5, x5, #0x1 (1)",
"cbz x5, #+0x30",
"ldr w26, [x11]",
"ldr w27, [x10]",
"subs x5, x5, #0x1 (1)",
"add x11, x11, x20",
"add x10, x10, x20",
"b.eq #-0x24"
"ccmp x27, x26, #nzcv, ne",
"b.eq #-0x1c",
"mov x20, x27",
"eor w27, w20, w26",
"subs w26, w20, w26",
"cfinv"
]
},
"repz cmpsq": {
"ExpectedInstructionCount": 12,
"ExpectedInstructionCount": 14,
"Comment": "0xa7",
"ExpectedArm64ASM": [
"ldrsb x20, [x28, #714]",
"lsl x20, x20, #3",
"cbz x5, #+0x28",
"ldr x21, [x11]",
"ldr x22, [x10]",
"eor w27, w22, w21",
"subs x26, x22, x21",
"cfinv",
"sub x5, x5, #0x1 (1)",
"cbz x5, #+0x30",
"ldr x26, [x11]",
"ldr x27, [x10]",
"subs x5, x5, #0x1 (1)",
"add x11, x11, x20",
"add x10, x10, x20",
"b.eq #-0x24"
"ccmp x27, x26, #nzcv, ne",
"b.eq #-0x1c",
"mov x20, x27",
"eor w27, w20, w26",
"subs x26, x20, x26",
"cfinv"
]
},
"repnz cmpsb": {
"ExpectedInstructionCount": 13,
"ExpectedInstructionCount": 15,
"Comment": "0xa6",
"ExpectedArm64ASM": [
"ldrsb x20, [x28, #714]",
"cbz x5, #+0x30",
"ldrb w21, [x11]",
"ldrb w22, [x10]",
"eor w27, w22, w21",
"lsl w0, w22, #24",
"cmp w0, w21, lsl #24",
"sub w26, w22, w21",
"cfinv",
"sub x5, x5, #0x1 (1)",
"cbz x5, #+0x38",
"ldrb w26, [x11]",
"ldrb w27, [x10]",
"subs x5, x5, #0x1 (1)",
"add x11, x11, x20",
"add x10, x10, x20",
"b.ne #-0x2c"
"ccmp x27, x26, #nZcv, ne",
"b.ne #-0x1c",
"mov x20, x27",
"eor w27, w20, w26",
"lsl w0, w20, #24",
"cmp w0, w26, lsl #24",
"sub w26, w20, w26",
"cfinv"
]
},
"repnz cmpsw": {
"ExpectedInstructionCount": 14,
"ExpectedInstructionCount": 16,
"Comment": "0xa7",
"ExpectedArm64ASM": [
"ldrsb x20, [x28, #714]",
"lsl x20, x20, #1",
"cbz x5, #+0x30",
"ldrh w21, [x11]",
"ldrh w22, [x10]",
"eor w27, w22, w21",
"lsl w0, w22, #16",
"cmp w0, w21, lsl #16",
"sub w26, w22, w21",
"cfinv",
"sub x5, x5, #0x1 (1)",
"cbz x5, #+0x38",
"ldrh w26, [x11]",
"ldrh w27, [x10]",
"subs x5, x5, #0x1 (1)",
"add x11, x11, x20",
"add x10, x10, x20",
"b.ne #-0x2c"
"ccmp x27, x26, #nZcv, ne",
"b.ne #-0x1c",
"mov x20, x27",
"eor w27, w20, w26",
"lsl w0, w20, #16",
"cmp w0, w26, lsl #16",
"sub w26, w20, w26",
"cfinv"
]
},
"repnz cmpsd": {
"ExpectedInstructionCount": 12,
"ExpectedInstructionCount": 14,
"Comment": "0xa7",
"ExpectedArm64ASM": [
"ldrsb x20, [x28, #714]",
"lsl x20, x20, #2",
"cbz x5, #+0x28",
"ldr w21, [x11]",
"ldr w22, [x10]",
"eor w27, w22, w21",
"subs w26, w22, w21",
"cfinv",
"sub x5, x5, #0x1 (1)",
"cbz x5, #+0x30",
"ldr w26, [x11]",
"ldr w27, [x10]",
"subs x5, x5, #0x1 (1)",
"add x11, x11, x20",
"add x10, x10, x20",
"b.ne #-0x24"
"ccmp x27, x26, #nZcv, ne",
"b.ne #-0x1c",
"mov x20, x27",
"eor w27, w20, w26",
"subs w26, w20, w26",
"cfinv"
]
},
"repnz cmpsq": {
"ExpectedInstructionCount": 12,
"ExpectedInstructionCount": 14,
"Comment": "0xa7",
"ExpectedArm64ASM": [
"ldrsb x20, [x28, #714]",
"lsl x20, x20, #3",
"cbz x5, #+0x28",
"ldr x21, [x11]",
"ldr x22, [x10]",
"eor w27, w22, w21",
"subs x26, x22, x21",
"cfinv",
"sub x5, x5, #0x1 (1)",
"cbz x5, #+0x30",
"ldr x26, [x11]",
"ldr x27, [x10]",
"subs x5, x5, #0x1 (1)",
"add x11, x11, x20",
"add x10, x10, x20",
"b.ne #-0x24"
"ccmp x27, x26, #nZcv, ne",
"b.ne #-0x1c",
"mov x20, x27",
"eor w27, w20, w26",
"subs x26, x20, x26",
"cfinv"
]
},
"test al, 1": {
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