InstCountCI: Update

Signed-off-by: Alyssa Rosenzweig <[email protected]>
FEX-Emu · Apr 1, 2024 · 5c590b9 · 5c590b9
1 parent eb4bb58
commit 5c590b9
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Showing 9 changed files with 302 additions and 305 deletions.
diff --git a/unittests/InstructionCountCI/FlagM/FlagOpts.json b/unittests/InstructionCountCI/FlagM/FlagOpts.json
@@ -267,18 +267,17 @@
       ]
     },
     "AND use only PF": {
-      "ExpectedInstructionCount": 9,
+      "ExpectedInstructionCount": 8,
       "x86Insts": [
         "and eax, ebx",
         "setp cl",
         "test cl, cl"
       ],
       "ExpectedArm64ASM": [
         "and w4, w4, w7",
-        "fmov s2, w4",
-        "cnt v2.16b, v2.16b",
-        "umov w20, v2.b[0]",
-        "mvn w20, w20",
+        "eor w20, w4, w4, lsr #4",
+        "eor w20, w20, w20, lsr #2",
+        "eon w20, w20, w20, lsr #1",
         "and x20, x20, #0x1",
         "bfxil x5, x20, #0, #8",
         "mov x26, x5",

diff --git a/unittests/InstructionCountCI/FlagM/Primary.json b/unittests/InstructionCountCI/FlagM/Primary.json
@@ -1746,9 +1746,9 @@
         "orr x20, x20, x21, lsl #20",
         "ldrb w21, [x28, #725]",
         "orr x20, x20, x21, lsl #21",
-        "fmov s2, w26",
-        "cnt v2.16b, v2.16b",
-        "umov w21, v2.b[0]",
+        "eor w21, w26, w26, lsr #4",
+        "eor w21, w21, w21, lsr #2",
+        "eor w21, w21, w21, lsr #1",
         "orr x21, x21, #0xfffffffffffffffe",
         "orn x20, x20, x21, ror #62",
         "mrs x21, nzcv",
@@ -1791,9 +1791,9 @@
         "orr x20, x20, x21, lsl #20",
         "ldrb w21, [x28, #725]",
         "orr x20, x20, x21, lsl #21",
-        "fmov s2, w26",
-        "cnt v2.16b, v2.16b",
-        "umov w21, v2.b[0]",
+        "eor w21, w26, w26, lsr #4",
+        "eor w21, w21, w21, lsr #2",
+        "eor w21, w21, w21, lsr #1",
         "orr x21, x21, #0xfffffffffffffffe",
         "orn x20, x20, x21, ror #62",
         "mrs x21, nzcv",
@@ -1866,9 +1866,9 @@
         "eor w21, w27, w26",
         "ubfx w21, w21, #4, #1",
         "orr x20, x20, x21, lsl #4",
-        "fmov s2, w26",
-        "cnt v2.16b, v2.16b",
-        "umov w21, v2.b[0]",
+        "eor w21, w26, w26, lsr #4",
+        "eor w21, w21, w21, lsr #2",
+        "eor w21, w21, w21, lsr #1",
         "orr x21, x21, #0xfffffffffffffffe",
         "orn x20, x20, x21, ror #62",
         "mrs x21, nzcv",

diff --git a/unittests/InstructionCountCI/FlagM/Secondary.json b/unittests/InstructionCountCI/FlagM/Secondary.json
@@ -265,12 +265,12 @@
       "ExpectedInstructionCount": 8,
       "Comment": "0x0f 0x4a",
       "ExpectedArm64ASM": [
-        "fmov s2, w26",
-        "cnt v2.16b, v2.16b",
-        "umov w20, v2.b[0]",
+        "eor w20, w26, w26, lsr #4",
+        "eor w20, w20, w20, lsr #2",
+        "eon w20, w20, w20, lsr #1",
         "mrs x21, nzcv",
         "tst w20, #0x1",
-        "csel w20, w7, w4, eq",
+        "csel w20, w7, w4, ne",
         "bfxil x4, x20, #0, #16",
         "msr nzcv, x21"
       ]
@@ -279,35 +279,35 @@
       "ExpectedInstructionCount": 7,
       "Comment": "0x0f 0x4a",
       "ExpectedArm64ASM": [
-        "fmov s2, w26",
-        "cnt v2.16b, v2.16b",
-        "umov w20, v2.b[0]",
+        "eor w20, w26, w26, lsr #4",
+        "eor w20, w20, w20, lsr #2",
+        "eon w20, w20, w20, lsr #1",
         "mrs x21, nzcv",
         "tst w20, #0x1",
-        "csel w4, w7, w4, eq",
+        "csel w4, w7, w4, ne",
         "msr nzcv, x21"
       ]
     },
     "cmovpe rax, rbx": {
       "ExpectedInstructionCount": 7,
       "Comment": "0x0f 0x4a",
       "ExpectedArm64ASM": [
-        "fmov s2, w26",
-        "cnt v2.16b, v2.16b",
-        "umov w20, v2.b[0]",
+        "eor w20, w26, w26, lsr #4",
+        "eor w20, w20, w20, lsr #2",
+        "eon w20, w20, w20, lsr #1",
         "mrs x21, nzcv",
         "tst w20, #0x1",
-        "csel x4, x7, x4, eq",
+        "csel x4, x7, x4, ne",
         "msr nzcv, x21"
       ]
     },
     "cmovnp ax, bx": {
       "ExpectedInstructionCount": 8,
       "Comment": "0x0f 0x4b",
       "ExpectedArm64ASM": [
-        "fmov s2, w26",
-        "cnt v2.16b, v2.16b",
-        "umov w20, v2.b[0]",
+        "eor w20, w26, w26, lsr #4",
+        "eor w20, w20, w20, lsr #2",
+        "eor w20, w20, w20, lsr #1",
         "mrs x21, nzcv",
         "tst w20, #0x1",
         "csel w20, w7, w4, ne",
@@ -319,9 +319,9 @@
       "ExpectedInstructionCount": 7,
       "Comment": "0x0f 0x4b",
       "ExpectedArm64ASM": [
-        "fmov s2, w26",
-        "cnt v2.16b, v2.16b",
-        "umov w20, v2.b[0]",
+        "eor w20, w26, w26, lsr #4",
+        "eor w20, w20, w20, lsr #2",
+        "eor w20, w20, w20, lsr #1",
         "mrs x21, nzcv",
         "tst w20, #0x1",
         "csel w4, w7, w4, ne",
@@ -332,9 +332,9 @@
       "ExpectedInstructionCount": 7,
       "Comment": "0x0f 0x4b",
       "ExpectedArm64ASM": [
-        "fmov s2, w26",
-        "cnt v2.16b, v2.16b",
-        "umov w20, v2.b[0]",
+        "eor w20, w26, w26, lsr #4",
+        "eor w20, w20, w20, lsr #2",
+        "eor w20, w20, w20, lsr #1",
         "mrs x21, nzcv",
         "tst w20, #0x1",
         "csel x4, x7, x4, ne",
@@ -513,13 +513,12 @@
       ]
     },
     "setpe al": {
-      "ExpectedInstructionCount": 6,
+      "ExpectedInstructionCount": 5,
       "Comment": "0x0f 0x9a",
       "ExpectedArm64ASM": [
-        "fmov s2, w26",
-        "cnt v2.16b, v2.16b",
-        "umov w20, v2.b[0]",
-        "mvn w20, w20",
+        "eor w20, w26, w26, lsr #4",
+        "eor w20, w20, w20, lsr #2",
+        "eon w20, w20, w20, lsr #1",
         "and x20, x20, #0x1",
         "bfxil x4, x20, #0, #8"
       ]
@@ -528,9 +527,9 @@
       "ExpectedInstructionCount": 5,
       "Comment": "0x0f 0x9b",
       "ExpectedArm64ASM": [
-        "fmov s2, w26",
-        "cnt v2.16b, v2.16b",
-        "umov w20, v2.b[0]",
+        "eor w20, w26, w26, lsr #4",
+        "eor w20, w20, w20, lsr #2",
+        "eor w20, w20, w20, lsr #1",
         "and x20, x20, #0x1",
         "bfxil x4, x20, #0, #8"
       ]