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Partly fixed timing issues
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@ErniW
ErniW committed Dec 28, 2022
1 parent 0190dbc commit a845b8d
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Showing 10 changed files with 672 additions and 2,524 deletions.
4 changes: 3 additions & 1 deletion .vscode/settings.json
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Expand Up @@ -3,6 +3,8 @@
"stm32f4xx.h": "c",
"stm32f446xx.h": "c",
"pll.h": "c",
"iostream": "cpp"
"iostream": "cpp",
"neopixels.h": "c",
"systick.h": "c"
}
}
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2,698 changes: 270 additions & 2,428 deletions build/Neopixels.hex
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10 changes: 5 additions & 5 deletions includes/neopixels.h
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@@ -1,15 +1,15 @@
#pragma once

typedef struct {
short g;
short r;
short b;
int r;
int g;
int b;
} Led;

void timer_init();
void dma_init();

Led setColor(short r, short g, short b);
Led setColor(int r, int g, int b);

void send(Led* strip, int length);
void send(Led *strip, int length);
void stop();
1 change: 1 addition & 0 deletions includes/sysTick.h
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Expand Up @@ -6,3 +6,4 @@
void SysTick_Init();
void SysTick_Handler();
void delay_ms(uint32_t ms);
uint32_t getMillis();
229 changes: 148 additions & 81 deletions main.c
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@@ -1,120 +1,187 @@
#include "./STM32F446RE/stm32f4xx.h"


#include "./STM32F446RE/stm32f446xx.h"
#include<stdio.h>
#include<stdint.h>
#include "./STM32F446RE/stm32f4xx.h"
#include "pll.h"
#include "sysTick.h"

#include "neopixels.h"
#include "serial.h"
#include <string.h>
// #include <iostream>

#include <stdio.h>
#include <stdbool.h>

#define PA5_AF_MODE (1 << 11)
#define PA5_AF1 (1 << 20)
int main(){

volatile int intervals[] = {500, 1000, 2000,3000,4000};
volatile int counter = 0;
clockSpeed_PLL();
SysTick_Init();
// tx_init();

inline void startDMA(){
DMA1_Stream5->CR |= DMA_SxCR_EN;
}
timer_init();
dma_init();

Led strip[8];

int value = 10;



long prevTime = 0;

while(1){


long time = getMillis();

if(time - prevTime > 10){


// strip[0] = setColor(value, 0,0);
// strip[1] = setColor(value, 0, 0);
// strip[2] = setColor(value, 0, 0);
// strip[3] = setColor(value, 0, 0);
// strip[4] = setColor(0,0,value);
// strip[5] = setColor(0,0,value);
// strip[6] = setColor(0,0,value);
// strip[7] = setColor(0,value, 0);

// int d = 255 / 8;

for(int i = 0; i < 8; i++){
strip[i] = setColor(value, value, value);
}

send(strip, 8);


value++;
value = value % 100;

prevTime = time;
}
//delay_ms(100);


}

inline void stopDMA(){
DMA1_Stream5->CR &=~ DMA_SxCR_EN;
}

int main(){

clockSpeed_PLL();
SysTick_Init();
tx_init();

RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN;
RCC->APB1ENR |= RCC_APB1ENR_TIM2EN;
// #include "./STM32F446RE/stm32f4xx.h"

GPIOA->MODER |= PA5_AF_MODE;
GPIOA->AFR[0] |= PA5_AF1;

TIM2->PSC = 9000-1;
TIM2->ARR = 10000;
// #include "./STM32F446RE/stm32f446xx.h"
// #include<stdio.h>
// #include<stdint.h>
// #include "pll.h"
// #include "sysTick.h"
// #include "serial.h"
// #include <string.h>
// // #include <iostream>
// #include <stdbool.h>

// #define PA5_AF_MODE (1 << 11)
// #define PA5_AF1 (1 << 20)

// volatile int intervals[] = {500, 1000, 2000,3000,4000};
// volatile int counter = 0;

// inline void startDMA(){
// DMA1_Stream5->CR |= DMA_SxCR_EN;
// }

TIM2->CCMR1 = TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2;
// inline void stopDMA(){
// DMA1_Stream5->CR &=~ DMA_SxCR_EN;
// }

// int main(){

// clockSpeed_PLL();
// SysTick_Init();
// tx_init();

// RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN;
// RCC->APB1ENR |= RCC_APB1ENR_TIM2EN;

// GPIOA->MODER |= PA5_AF_MODE;
// GPIOA->AFR[0] |= PA5_AF1;

TIM2->CCR1 = 0;
// TIM2->PSC = 9000-1;
// TIM2->ARR = 10000;

// TIM2->CCMR1 = TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2;

// TIM2->CCR1 = 0;

TIM2->DIER |= TIM_DIER_UIE;
TIM2->DIER |= TIM_DIER_CC1IE;
// TIM2->DIER |= TIM_DIER_UIE;
// TIM2->DIER |= TIM_DIER_CC1IE;

TIM2->CR1 |= TIM_CR1_URS;
// TIM2->CR1 |= TIM_CR1_URS;

TIM2->DIER |= TIM_DIER_CC1DE;
TIM2->DIER |= TIM_DIER_UDE;
TIM2->CR2 |= TIM_CR2_CCDS;
// TIM2->DIER |= TIM_DIER_CC1DE;
// TIM2->DIER |= TIM_DIER_UDE;
// TIM2->CR2 |= TIM_CR2_CCDS;

TIM2->CCER |= TIM_CCER_CC1E;
TIM2->CR1 |= TIM_CR1_CEN;
// TIM2->CCER |= TIM_CCER_CC1E;
// TIM2->CR1 |= TIM_CR1_CEN;

NVIC_EnableIRQ(TIM2_IRQn);
// NVIC_EnableIRQ(TIM2_IRQn);



//---------------------------------
// //---------------------------------

#define DMA_CHANNEL_3 (3 <<25)
#define MEM_SIZE_32 (1 << 14)
#define PERIPH_SIZE_32 ( 1 << 12)
// #define DMA_CHANNEL_3 (3 <<25)
// #define MEM_SIZE_32 (1 << 14)
// #define PERIPH_SIZE_32 ( 1 << 12)

#define DMA_MEM_TO_PERIPHERAL ( 1 << 6)
// #define DMA_MEM_TO_PERIPHERAL ( 1 << 6)


RCC->AHB1ENR |= RCC_AHB1ENR_DMA1EN;
DMA1_Stream5->CR = 0;
while(DMA1_Stream5->CR & DMA_SxCR_EN);
// RCC->AHB1ENR |= RCC_AHB1ENR_DMA1EN;
// DMA1_Stream5->CR = 0;
// while(DMA1_Stream5->CR & DMA_SxCR_EN);

DMA1_Stream5->CR |= DMA_CHANNEL_3;
DMA1_Stream5->CR |= DMA_SxCR_CIRC;
DMA1_Stream5->CR |= DMA_SxCR_MINC;
DMA1_Stream5->CR |= MEM_SIZE_32;
DMA1_Stream5->CR |= PERIPH_SIZE_32;
DMA1_Stream5->CR |= DMA_MEM_TO_PERIPHERAL;
// DMA1_Stream5->CR |= DMA_CHANNEL_3;
// DMA1_Stream5->CR |= DMA_SxCR_CIRC;
// DMA1_Stream5->CR |= DMA_SxCR_MINC;
// DMA1_Stream5->CR |= MEM_SIZE_32;
// DMA1_Stream5->CR |= PERIPH_SIZE_32;
// DMA1_Stream5->CR |= DMA_MEM_TO_PERIPHERAL;

DMA1_Stream5->CR |= DMA_SxCR_TCIE;
// DMA1_Stream5->CR |= DMA_SxCR_TCIE;

DMA1_Stream5->NDTR = 5;
DMA1_Stream5->PAR = (uint32_t)(&TIM2->CCR1);
DMA1_Stream5->M0AR = (uint32_t)(&intervals);
// DMA1_Stream5->NDTR = 5;
// DMA1_Stream5->PAR = (uint32_t)(&TIM2->CCR1);
// DMA1_Stream5->M0AR = (uint32_t)(&intervals);

NVIC_EnableIRQ(DMA1_Stream5_IRQn);
startDMA();
// NVIC_EnableIRQ(DMA1_Stream5_IRQn);
// startDMA();

while(1){
// while(1){

}
// }

}
// }


void TIM2_IRQHandler(void) {
if (TIM2->SR & TIM_SR_UIF) {
TIM2->SR &=~ TIM_SR_UIF;
printf("UIF %d\n",TIM2->CCR1);
// void TIM2_IRQHandler(void) {
// if (TIM2->SR & TIM_SR_UIF) {
// TIM2->SR &=~ TIM_SR_UIF;
// printf("UIF %d\n",TIM2->CCR1);

}
else if(TIM2->SR & TIM_SR_CC1IF){
TIM2->SR &=~ TIM_SR_CC1IF;
printf("CC1IF %d\n",TIM2->CCR1);
}
}
// }
// else if(TIM2->SR & TIM_SR_CC1IF){
// TIM2->SR &=~ TIM_SR_CC1IF;
// printf("CC1IF %d\n",TIM2->CCR1);
// }
// }

void DMA1_Stream5_IRQHandler(void){
if(DMA1->HISR & DMA_HISR_TCIF5){
DMA1->HIFCR |= DMA_HIFCR_CTCIF5;
printf("DMA DONE %d\n",TIM2->CCR1);
}
// void DMA1_Stream5_IRQHandler(void){
// if(DMA1->HISR & DMA_HISR_TCIF5){
// DMA1->HIFCR |= DMA_HIFCR_CTCIF5;
// printf("DMA DONE %d\n",TIM2->CCR1);
// }

}
// }


// działający inkrement z każdym cyklem a nie pulsem!
Expand Down Expand Up @@ -254,7 +321,7 @@ void DMA1_Stream5_IRQHandler(void){
// }
// }

int __io_putchar(int ch){
tx_send(ch);
return ch;
}
// int __io_putchar(int ch){
// tx_send(ch);
// return ch;
// }
2 changes: 1 addition & 1 deletion sources/neopixels copy.c
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Expand Up @@ -73,7 +73,7 @@ void dma_init(int vals, int peripheral, int size){
TIM2->SR &=~ TIM_SR_UIF;
}

Led setColor(short r, short g, short b){
Led setColor(int r, int g, int b){
Led color = {g, r, b};
return color;
};
Expand Down
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