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novacustom/v5.0tnx: port more GPIO config from clevo fw
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Signed-off-by: Michał Kopeć <[email protected]>
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@mkopec
mkopec committed Sep 27, 2024
1 parent c71392f commit 5220732
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Showing 4 changed files with 58 additions and 40 deletions.
47 changes: 27 additions & 20 deletions src/board/novacustom/v540tnx/gpio.c
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Original file line number Diff line number Diff line change
Expand Up @@ -25,6 +25,7 @@ struct Gpio __code LED_PWR = GPIO(D, 0);
struct Gpio __code LID_SW_N = GPIO(B, 1);
struct Gpio __code PCH_PWROK_EC = GPIO(F, 3);
struct Gpio __code PD_EN = GPIO(D, 4);
struct Gpio __code PD_IRQ = GPIO(E, 2);
struct Gpio __code PWR_BTN_N = GPIO(D, 5);
struct Gpio __code PWR_SW_N = GPIO(B, 3);
struct Gpio __code RGBKB_DET_N = GPIO(I, 2);
Expand All @@ -38,26 +39,30 @@ struct Gpio __code XLP_OUT = GPIO(B, 4);

void gpio_init(void) {
// Set global configuration
// Enable LPC reset on GPD2
GCR = 0b10 << 1;
// Disable UARTs
GCR = 4;
GCR1 = 0;
GCR2 = 0;
GCR3 = 64;
GCR4 = 0;
GCR5 = 0;
GCR6 = 0;
// PWRSW WDT 2 Enable 1
GCR8 = BIT(4);
// PWRSW WDT 2 Enable 2
GCR9 = BIT(5);
// Enable SMBus channel 4
GCR15 = BIT(4);
// Set GPB5 and GPD2 to 1.8V
GCR19 = BIT(7) | BIT(0);
// Set GPD3 to 1.8V, GPF2 and GPF3 to 3.3V
GCR20 = BIT(7);
// Set GPF6, GPF7, GPH0, and GPH1 to 1.8V
GCR21 = BIT(6), BIT(5) | BIT(2) | BIT(1);
// Set VCC power domain to 1.8V
GCR22 = BIT(7);
// Set GPM6 power domain to VCC
GCR23 = BIT(0);
GCR7 = 0;
GCR8 = 16;
GCR9 = 32;
GCR10 = 2;
GCR11 = 0;
GCR12 = 0;
GCR13 = 0;
GCR14 = 0;
GCR15 = 16;
GCR16 = 0;
GCR17 = 0;
GCR18 = 0;
GCR19 = 129;
GCR20 = 0;
GCR21 = 0;
GCR22 = 16;
GCR23 = 32;

// Set GPIO data
GPDRA = 0;
Expand Down Expand Up @@ -112,6 +117,8 @@ void gpio_init(void) {
GPCRB5 = GPIO_IN;
// SUSBC_EC
GPCRB6 = GPIO_OUT;
// Unknown
GPCRB7 = GPIO_IN;

// ALL_SYS_PWRGD
GPCRC0 = GPIO_IN;
Expand Down Expand Up @@ -243,7 +250,7 @@ void gpio_init(void) {
// VA_EC_EN
GPCRJ4 = GPIO_OUT;
// VBATT_BOOST#
GPCRJ5 = GPIO_OUT;
GPCRJ5 = GPIO_IN; // should probably be output, but Clevo FW set it as input
// EC_GPIO
GPCRJ6 = GPIO_OUT | GPIO_UP;
// KB-DET
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2 changes: 2 additions & 0 deletions src/board/novacustom/v540tnx/include/board/gpio.h
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Original file line number Diff line number Diff line change
Expand Up @@ -32,6 +32,8 @@ extern struct Gpio __code LID_SW_N;
extern struct Gpio __code PCH_PWROK_EC;
#define HAVE_PD_EN 1
extern struct Gpio __code PD_EN;
#define HAVE_PD_IRQ 1
extern struct Gpio __code PD_IRQ;
#define HAVE_PM_PWROK 0
extern struct Gpio __code PWR_BTN_N;
extern struct Gpio __code PWR_SW_N;
Expand Down
47 changes: 27 additions & 20 deletions src/board/novacustom/v560tnx/gpio.c
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Original file line number Diff line number Diff line change
Expand Up @@ -25,6 +25,7 @@ struct Gpio __code LED_PWR = GPIO(D, 0);
struct Gpio __code LID_SW_N = GPIO(B, 1);
struct Gpio __code PCH_PWROK_EC = GPIO(F, 3);
struct Gpio __code PD_EN = GPIO(D, 4);
struct Gpio __code PD_IRQ = GPIO(E, 2);
struct Gpio __code PWR_BTN_N = GPIO(D, 5);
struct Gpio __code PWR_SW_N = GPIO(B, 3);
struct Gpio __code RGBKB_DET_N = GPIO(I, 2);
Expand All @@ -38,26 +39,30 @@ struct Gpio __code XLP_OUT = GPIO(B, 4);

void gpio_init(void) {
// Set global configuration
// Enable LPC reset on GPD2
GCR = 0b10 << 1;
// Disable UARTs
GCR = 4;
GCR1 = 0;
GCR2 = 0;
GCR3 = 64;
GCR4 = 0;
GCR5 = 0;
GCR6 = 0;
// PWRSW WDT 2 Enable 1
GCR8 = BIT(4);
// PWRSW WDT 2 Enable 2
GCR9 = BIT(5);
// Enable SMBus channel 4
GCR15 = BIT(4);
// Set GPB5 and GPD2 to 1.8V
GCR19 = BIT(7) | BIT(0);
// Set GPD3 to 1.8V, GPF2 and GPF3 to 3.3V
GCR20 = BIT(7);
// Set GPF6, GPF7, GPH0, and GPH1 to 1.8V
GCR21 = BIT(6), BIT(5) | BIT(2) | BIT(1);
// Set VCC power domain to 1.8V
GCR22 = BIT(7);
// Set GPM6 power domain to VCC
GCR23 = BIT(0);
GCR7 = 0;
GCR8 = 16;
GCR9 = 32;
GCR10 = 2;
GCR11 = 0;
GCR12 = 0;
GCR13 = 0;
GCR14 = 0;
GCR15 = 16;
GCR16 = 0;
GCR17 = 0;
GCR18 = 0;
GCR19 = 129;
GCR20 = 0;
GCR21 = 0;
GCR22 = 16;
GCR23 = 32;

// Set GPIO data
GPDRA = 0;
Expand Down Expand Up @@ -112,6 +117,8 @@ void gpio_init(void) {
GPCRB5 = GPIO_IN;
// SUSBC_EC
GPCRB6 = GPIO_OUT;
// Unknown
GPCRB7 = GPIO_IN;

// ALL_SYS_PWRGD
GPCRC0 = GPIO_IN;
Expand Down Expand Up @@ -243,7 +250,7 @@ void gpio_init(void) {
// VA_EC_EN
GPCRJ4 = GPIO_OUT;
// VBATT_BOOST#
GPCRJ5 = GPIO_OUT;
GPCRJ5 = GPIO_IN; // should probably be output, but Clevo FW set it as input
// EC_GPIO
GPCRJ6 = GPIO_OUT | GPIO_UP;
// KB-DET
Expand Down
2 changes: 2 additions & 0 deletions src/board/novacustom/v560tnx/include/board/gpio.h
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Original file line number Diff line number Diff line change
Expand Up @@ -32,6 +32,8 @@ extern struct Gpio __code LID_SW_N;
extern struct Gpio __code PCH_PWROK_EC;
#define HAVE_PD_EN 1
extern struct Gpio __code PD_EN;
#define HAVE_PD_IRQ 1
extern struct Gpio __code PD_IRQ;
#define HAVE_PM_PWROK 0
extern struct Gpio __code PWR_BTN_N;
extern struct Gpio __code PWR_SW_N;
Expand Down

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